HYB514100BJ-50-中文資料西門子數據手冊PDF規(guī)格書

4M × 1-Bit Dynamic RAM

The HYB 514100BJ is the new generation dynamic RAM organized as 4 194 304 words by 1-bit. The HYB 514100BJ utilizes CMOS silicon gate process as well as advances circuit techniques to provide wide operation margins, both internally and for the system user. Multiplexed address inputs permit the HYB 514100BJ to be packed in a standard plastic P-SOJ-26/20 package. This package size provides high system bit densities and is compatible with commonly used automatic testing and insertion equipment. System oriented features include single + 5 V (± 10 ) power supply, direct interfacing with high performance logic device families such as Schottky TTL.

Advanced Information

? 4 194 304 words by 1-bit organization

? 0 to 70 °C operating temperature

? Fast Page Mode Operation

? Performance:

? Single + 5 V (± 10 ) supply with a built-in VBB generator

? Low power dissipation

max. 660 mW active (-50 version)

max. 605 mW active (-60 version)

? Standby power dissipation:

11 mW max. standby (TTL)

5.5 mW max. standby (CMOS)

? Output unlatched at cycle end allows two-dimensional chip selection

? Read, write, read-modify write, CAS-before-RAS refresh, RAS-only refresh, hidden refresh and test mode capability

? All inputs and outputs TTL-compatible

? 1024 refresh cycles/16 ms

? Plastic Packages: P-SOJ-26/20-2 with 300 mil width