HX2040中文資料霍尼韋爾數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

GENERAL DESCRIPTION

The HX2000 and HX2000r gate arrays are performance oriented sea-of-transistor arrays, fabricated on Honeywell’s RICMOS? IV Silicon On Insulator (SOI) process. The HX2000 arrays are for 5V designs only. The HX2000r arrays support 5V and 3.3V operation. High density is achieved with the standard 3-layer metal or optional 4-layer metal process, providing up to 290,000 usable gates.

FEATURES

? Fabricated on Honeywell’s Radiation Hardened

– 0.65 μmLeff RICMOS? IV SOI Process, HX2000

– 0.55 μmLeff RICMOS? IV SOI Process, HX2000r

? Array Sizes from 40K to 390K Available Gates (Raw)

? HX2000 Supports 5V Core Operation

? HX2000r Supports 3.3V Core Operation

? HX2000r Supports Mixed Voltage I/O Buffers

? TTL (5V) or CMOS (5V/3.3V) Compatible I/O

? Configurable Multi-Port Gate Array SRAM

? Single or Dual Port Custom SRAM Drop-In Capability

? Supports Chip Level Power Down for Cold Sparing

? Supports System Speeds Beyond 100 MHz

? Total Dose Hardness ≥1x106 rad(SiO2)

? Dose Rate Upset Hardness:

≥1x1010 rad(Si)/sec, HX2000*

≥1x109 rad(Si)/sec, HX2000r*

Option Available for:

≥1x1011 rad(Si)/sec, HX2000*

≥1x1010 rad(Si)/sec, HX2000r*

? Dose Rate Survivability ≥1x1012 rad(Si)/sec*

? Soft Error Rate

≤1x10-11 Errors/Bit/Day, HX2000

≤1x10-10 Errors/Bit/Day, HX2000r

? Neutron Fluence Hardness to 1x1014/cm2

? No Latchup