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HS1-81C56RH中文資料Intersil數(shù)據(jù)手冊PDF規(guī)格書
HS1-81C56RH規(guī)格書詳情
The HS-81C55/56RH are radiation hardened RAM and I/O chips fabricated using the Intersil radiation hardened Self Aligned Junction Isolated (SAJI) silicon gate technology. Latch-up free operation is achieved by the use of epitaxial starting material to eliminate the parasitic SCR effect seen in conventional bulk CMOS devices.
Features
? Electrically Screened to SMD # 5962-96766
? QML Qualified per MIL-PRF-38535 Requirements
? Radiation Hardened EPI-CMOS
- Total Dose. . . . . . . . . . . . . . . . . . . . . 100 krad(Si) (Max)
- Transient Upset. . . . . . . . . . . . . . . . . .>1 x 108 rad(Si)/s
- Latch-Up Free. . . . . . . . . . . . . . . . . .>1 x 1012 rad(Si)/s
? Electrically Equivalent to Sandia SA 3001
? Pin Compatible with Intel 8155/56
? Bus Compatible with HS-80C85RH
? Single 5V Power Supply
? Low Standby Current . . . . . . . . . . . . . . . . . . . .200μA Max
? Low Operating Current . . . . . . . . . . . . . . . . . . . . 2mA/MHz
? Completely Static Design
? Internal Address Latches
? Two Programmable 8-Bit I/O Ports
? One Programmable 6-Bit I/O Port
? Programmable 14-Bit Binary Counter/Timer
? Multiplexed Address and Data Bus
? Self Aligned Junction Isolated (SAJI) Process
? Military Temperature Range . . . . . . . . . . . -55℃ to 125℃
產(chǎn)品屬性
- 型號:
HS1-81C56RH
- 制造商:
INTERSIL
- 制造商全稱:
Intersil Corporation
- 功能描述:
Radiation Hardened 256 x 8 CMOS RAM
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
INTERSI |
2020+ |
CDIP |
80000 |
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詢價 | ||
xilinx |
22+ |
DIP-24 |
6800 |
詢價 | |||
H |
21+ |
CDIP |
5288 |
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詢價 | ||
HARRIS/哈里斯 |
23+ |
CDIP |
10000 |
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詢價 | ||
H |
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CDIP |
63 |
全新原裝 研究所指定供貨商 |
詢價 | ||
H |
23+ |
CDIP |
66800 |
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詢價 | ||
MICROSEMI |
18+ |
MODULE |
2050 |
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詢價 | ||
HS1-82C08RH-8 |
21 |
21 |
詢價 | ||||
MicrosemiPowerProductsGr |
2022 |
HALF-PAK |
58 |
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詢價 | ||
23+ |
CDIP24 |
60895 |
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詢價 |