HI5710A中文資料Intersil數(shù)據(jù)手冊PDF規(guī)格書

Description

The HI5710A is a low power, 10-bit, CMOS analog-to-digital converter. The use of a 2-step architecture realizes low power consumption, 150mW, and a maximum conversion speed of 20MHz with only a 3 clock cycle data latency. The HI5710A can be powered down, disabling the chip and the digital outputs, reducing power to less than 5mW. A built-in, user controllable, calibration circuit is used to provide low linearity error, 1 LSB. The low power, high speed and small package outline make the HI5710A an ideal choice for CCD, battery, and high channel count applications.

Features

? Resolution ±0.5 LSB (DNL) . . . . . . . . . . . . . . . . . . 10-Bit

? Maximum Sampling Frequency . . . . . . . . . . . 20 MSPS

? Low Power Consumption (Reference Current Excluded) . . . . . . . . . . . . . .150mW

? Standby Mode Power . . . . . . . . . . . . . . . . . . . . . . .5mW

? No Sample and Hold Required

? TTL Compatible Inputs

? Three-State TTL Compatible Outputs

? Single +5V Analog Power Supply

? Single +3.3V or +5V Digital Power Supply

Applications

? Video Digitizing - Multimedia

? Data Communications

? Image Scanners

? Medical Imaging

? Video Recording Equipment

? Camcorders

? QAM Demodulation