HD74LVC373A中文資料日立數(shù)據(jù)手冊PDF規(guī)格書

Description

The HD74LVC373A has eight D type latches with three state outputs in a 20 pin package. When the latch enable input is high, the Q outputs will follow the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. Low voltage and high speed operation is suitable at the battery drive product (note type personal computer) and low power consumption extends the life of a battery for long time operation.

Features

? VCC = 2.0 V to 5.5 V

? All inputs VIH(Max.) = 5.5 V (@VCC = 0 V to 5.5 V)

? All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state)

? Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)

? Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)

? High output current ±24 mA (@VCC = 3.0 V to 5.5 V)