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HD74AC74RPEL中文資料瑞薩數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
| 廠(chǎng)商型號(hào) |
HD74AC74RPEL |
| 功能描述 | Dual D-Type Positive Edge-Triggered Flip-Flop |
| 文件大小 |
121.33 Kbytes |
| 頁(yè)面數(shù)量 |
8 頁(yè) |
| 生產(chǎn)廠(chǎng)商 | Renesas Technology Corp |
| 企業(yè)簡(jiǎn)稱(chēng) |
RENESAS【瑞薩】 |
| 中文名稱(chēng) | 瑞薩科技有限公司官網(wǎng) |
| 原廠(chǎng)標(biāo)識(shí) |  |
| 數(shù)據(jù)手冊(cè) | |
| 更新時(shí)間 | 2025-1-1 11:10:00 |
HD74AC74RPEL規(guī)格書(shū)詳情
Description
The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input
Features
Asynchronous Inputs:
Low input to SD (Set) sets Q to High level
Low input to CD (Clear) sets Q to Low level
Clear and Set are independent of clock
Simultaneous Low on CD and SD makes both Q and Q High
? Outputs Source/Sink 24 mA
產(chǎn)品屬性
- 型號(hào)：
HD74AC74RPEL
- 制造商：
RENESAS
- 制造商全稱(chēng)：
Renesas Technology Corp
- 功能描述：
Dual D-Type Positive Edge-Triggered Flip-Flop
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23+ |
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