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HB52RD649DC-A6BL中文資料美光科技數(shù)據(jù)手冊(cè)PDF規(guī)格書

HB52RD649DC-A6BL
廠商型號(hào)

HB52RD649DC-A6BL

功能描述

512MB Unbuffered SDRAM S.O.DIMM

文件大小

464.02 Kbytes

頁面數(shù)量

16

生產(chǎn)廠商 Elpida Memory
企業(yè)簡(jiǎn)稱

ELPIDA美光科技

中文名稱

美光科技股份有限公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

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更新時(shí)間

2025-2-28 13:39:00

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HB52RD649DC-A6BL規(guī)格書詳情

Description

The HB52RF649DC, HB52RD649DC are a 64M × 72 × 2 banks Synchronous Dynamic RAM Small Outline Dual In-line Memory Module (S.O.DIMM), mounted 18 pieces of 256M bits SDRAM sealed in TCP package and 1 piece of serial EEPROM (2k bits) for Presence Detect (PD). An outline of the products is 144-pin Zig Zag Dual tabs socket type compact and thin package. Therefore, they make high density mounting possible without surface mount technology. They provide common data inputs and outputs. Decoupling capacitors are mounted beside TCP on the module board.

Features

? Fully compatible with: JEDEC standard outline 8 bytes S.O.DIMM

? 144-pin Zig Zag Dual tabs socket type (dual lead out)

- PCB height: 33.02mm (1.30inch)

- Lead pitch: 0.80mm

? 3.3V power supply

? Clock frequency: 133MHz/100MHz (max.)

? LVTTL interface

? Data bus width: × 72 ECC

? Single pulsed /RAS

? 4 Banks can operates simultaneously and independently

? Burst read/write operation and burst read/single write operation capability

? Programmable burst length (BL): 1, 2, 4, 8

? 2 variations of burst sequence

- Sequential

- Interleave

? Programmable /CE latency (CL): 2, 3

? Byte control by DQMB

? Refresh cycles: 8192 refresh cycles/64ms

? 2 variations of refresh

- Auto refresh

- Self refresh

? Low self refresh current

: HB52RF649DC-xxBL (L-version)

: HB52RD649DC-xxBL (L-version)

產(chǎn)品屬性

  • 型號(hào):

    HB52RD649DC-A6BL

  • 制造商:

    ELPIDA

  • 制造商全稱:

    Elpida Memory

  • 功能描述:

    512MB Unbuffered SDRAM S.O.DIMM

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