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零件編號 | 下載 訂購 | 功能描述/絲印 | 制造商 上傳企業(yè) | LOGO |
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4GbDDR3LSDRAM | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAM | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAM | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix |
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