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F6123EVS中文資料瑞薩數(shù)據(jù)手冊(cè)PDF規(guī)格書

F6123EVS
廠商型號(hào)

F6123EVS

功能描述

Dual-beam Rx Active Beamforming IC 14.4 – 17.3 GHz

文件大小

257.3 Kbytes

頁(yè)面數(shù)量

3 頁(yè)

生產(chǎn)廠商 Renesas Technology Corp
企業(yè)簡(jiǎn)稱

RENESAS瑞薩

中文名稱

瑞薩科技有限公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

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更新時(shí)間

2024-11-2 22:59:00

F6123EVS規(guī)格書詳情

Features

? 14.4 – 17.3GHz operation

? Supports 4 dual-pol or 8 single-pol elements

? Two simultaneous and independent beam outputs

? 360° phase control with 6-bit resolution

? 26dB gain control with 0.45dB step size

? 2.3V nominal single supply input

? Standard 1.8V digital logic

? IDAC for external LNA biasing

? Temperature compensation

? Temperature sensor w/ digital readout

? Advanced digital modes with fast beam steering

? On-chip beam-state memory

? 3.8 ? 4.6 ? 0.9 mm, 63-FCBGA

Typical Applications

? Phased array antennas

? Ku-Band SATCOM terminals

? Common Data Link (CDL) terminals

? Ku-Band radar

? Aerospace, maritime, and SOTM

? Instrumentation

Description

The F6123 is a 16-channel dual-beam receive active beamforming

RFIC designed for application in Ku/CDL-Band planar phased

array antennas. The IC has eight RF input ports, two RF output

ports, and 16 (8 per beam) phase/amplitude control channels. The

eight input ports of the IC can be driven by eight single-polarized

elements or four dual-polarized elements of an electronically

scanned array (ESA). Each channel has 6 bits of digital phase and

gain control resolution spanning 360° and 26dB of dynamic range,

enabling precise beam pattern and polarization control.

The IC operates from a single supply of 2.1 - 2.5V. When paired

with the Renesas F6923 LNA, it achieves a typical cascaded gain

of 30dB, while minimizing the front end feed loss due to the

flexibility of LNA physical placement near the antenna feeds. The

chip includes power management features such as a low-power

standby mode, independent enable controls on every channel, and

a single-beam mode activated via a dedicated control pin. The

device SPI bus and control pins operate from standard 1.8V logic

at speeds up to 50MHz. Advanced digital modes and large on-chip

memory allow for < 100ns beam position switching times at the

array level, greatly reducing dead time and latency.

Finally, the compact and CTE-matched FCBGA organic package

with all single-ended 50ohm matched RF ports and 0.5mm pitch

greatly simplifies the physical integration of these devices onto

large antenna panels.

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