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EP2C15AQ324C6N中文資料阿爾特數(shù)據(jù)手冊PDF規(guī)格書
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Introduction
Following the immensely successful first-generation Cyclone? device family, Altera? Cyclone II FPGAs extend the low-cost FPGA density range to 68,416 logic elements (LEs) and provide up to 622 usable I/O pins and up to 1.1 Mbits of embedded memory. Cyclone II FPGAs are manufactured on 300-mm wafers using TSMCs 90-nm low-k dielectric process to ensure rapid availability and low cost.
Features The Cyclone II device family offers the following features:
■ High-density architecture with 4,608 to 68,416 LEs
● M4K embedded memory blocks
● Up to 1.1 Mbits of RAM available without reducing available logic
● 4,096 memory bits per block (4,608 bits per block including 512 parity bits)
● Variable port configurations of ×1, ×2, ×4, ×8, ×9, ×16, ×18, ×32, and ×36
● True dual-port (one read and one write, two reads, or two writes) operation for ×1, ×2, ×4, ×8, ×9, ×16, and ×18 modes
● Byte enables for data input masking during writes
● Up to 260-MHz operation
■ Embedded multipliers
● Up to 150 18- × 18-bit multipliers are each configurable as two independent 9- × 9-bit multipliers with up to 250-MHz performance
● Optional input and output registers
■ Advanced I/O support
● High-speed differential I/O standard support, including LVDS, RSDS, mini-LVDS, LVPECL, differential HSTL, and differential SSTL
● Single-ended I/O standard support, including 2.5-V and 1.8-V, SSTL class I and II, 1.8-V and 1.5-V HSTL class I and II, 3.3-V PCI and PCI-X 1.0, 3.3-, 2.5-, 1.8-, and 1.5-V LVCMOS, and 3.3-, 2.5-, and 1.8-V LVTTL
● Peripheral Component Interconnect Special Interest Group (PCI SIG) PCI Local Bus Specification, Revision 3.0 compliance for 3.3-V operation at 33 or 66 MHz for 32- or 64-bit interfaces
● PCI Express with an external TI PHY and an Altera PCI Express ×1 Megacore? function
● 133-MHz PCI-X 1.0 specification compatibility
● High-speed external memory support, including DDR, DDR2, and SDR SDRAM, and QDRII SRAM supported by drop in Altera IP MegaCore functions for ease of use
● Three dedicated registers per I/O element (IOE): one input register, one output register, and one output-enable register
● Programmable bus-hold feature
● Programmable output drive strength feature
● Programmable delays from the pin to the IOE or logic array
● I/O bank grouping for unique VCCIO and/or VREF bank settings
● MultiVolt? I/O standard support for 1.5-, 1.8-, 2.5-, and 3.3-interfaces
● Hot-socketing operation support
● Tri-state with weak pull-up on I/O pins before and during configuration
● Programmable open-drain outputs
● Series on-chip termination support
(Continue ...)
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
Altera |
21+ |
BGA |
26800 |
只做原裝,質(zhì)量保證 |
詢價 | ||
SEMITEC |
23+ |
6540 |
只做原裝正品現(xiàn)貨或者訂貨假一賠十! |
詢價 | |||
ALTERA |
23+ |
256FBGA |
6200 |
中國領(lǐng)先的ALTERA嵌入式專業(yè)分銷商!原裝正品! |
詢價 | ||
alterA |
24+ |
12 |
原裝現(xiàn)貨,可開13%稅票 |
詢價 | |||
ALTERA(阿爾特拉) |
23+ |
NA |
20094 |
正納10年以上分銷經(jīng)驗原裝進口正品做服務(wù)做口碑有支持 |
詢價 | ||
ALTERA/INTEL |
20+ |
BGA |
2300 |
全新原裝,價格超越代理。 |
詢價 | ||
ALTERA |
19+ |
BGA |
8259 |
原廠代理渠道,每一顆芯片都可追溯原廠; |
詢價 | ||
ALTERA |
23+ |
BGA |
9680 |
價格優(yōu)勢、原裝現(xiàn)貨、客戶至上。歡迎廣大客戶來電查詢 |
詢價 | ||
Intel FPGAs/Altera |
21+ |
256-FBGA(17x17) |
65200 |
一級代理/放心采購 |
詢價 | ||
ALTERA/INTEL |
2021 |
BGA |
1000 |
全新、原裝 |
詢價 |