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DS34T101集成電路(IC)的專用IC規(guī)格書PDF中文資料
廠商型號(hào) |
DS34T101 |
參數(shù)屬性 | DS34T101 包裝為托盤;類別為集成電路(IC)的專用IC;產(chǎn)品描述:IC TDM 484TEBGA |
功能描述 | Single/Dual/Quad/Octal TDM-Over-Packet Chip |
文件大小 |
803.77 Kbytes |
頁面數(shù)量 |
74 頁 |
生產(chǎn)廠商 | Maxim Integrated Products |
企業(yè)簡(jiǎn)稱 |
Maxim【美信】 |
中文名稱 | 美信半導(dǎo)體官網(wǎng) |
原廠標(biāo)識(shí) | |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-1-13 16:46:00 |
DS34T101規(guī)格書詳情
General Description
These IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC compliant devices allow up to eight E1, T1 or serial streams or one high-speed E3, T3, STS-1 or serial stream to be transported transparently over IP, MPLS or Ethernet networks. Jitter and wander of recovered clocks conform to G.823/G.824, G.8261, and TDM specifications. TDM data is transported in up to 64 individually configurable bundles. All standards based TDM-over-packet mapping methods are supported except AAL2. Frame-based serial HDLC data flows are also supported. With built-in full featured E1/T1 framers and LIUs. These ICs encapsulate the TDM-over-packet solution from analog E1/T1 signal to Ethernet MII while preserving options to make use of TDM streams at key intermediate points. The high level of integration available with the DS34T10x devices minimizes cost, board space, and time to market.
Features
? Full-Featured IC Includes E1/T1 LIUs and Framers, TDMoP Engine, and 10/100 MAC
? Transport of E1, T1, E3, T3 or STS-1 TDM or CBR Serial Signals Over Packet Networks
? Full Support for These Mapping Methods: SAToP, CESoPSN, TDMoIP (AAL1), HDLC, Unstructured, Structured, Structured with CAS
? Adaptive Clock Recovery, Common Clock, External Clock and Loopback Timing Modes
? On-Chip TDM Clock Recovery Machines, One Per Port, Independently Configurable
? Clock Recovery Algorithm Handles Network PDV, Packet Loss, Constant Delay Changes, Frequency Changes and Other Impairments
? 64 Independent Bundles/Connections
? Multiprotocol Encapsulation Supports IPv4, IPv6, UDP, RTP, L2TPv3, MPLS, Metro Ethernet
? VLAN Support According to 802.1p and 802.1Q
? 10/100 Ethernet MAC Supports MII/RMII/SSMII
? Selectable 32-Bit, 16-Bit or SPI Processor Bus
? Operates from Only Two Clock Signals, One for Clock Recovery and One for Packet Processing
? Glueless SDRAM Buffer Management
? Low-Power 1.8V Core, 3.3V I/O
Applications
? TDM Circuit Extension Over PSN
???? o Leased-Line Services Over PSN
???? o TDM Over GPON/EPON
???? o TDM Over Cable
???? o TDM Over Wireless
? Cellular Backhaul Over PSN
? Multiservice Over Unified PSN
? HDLC-Based Traffic Transport Over PSN
?
產(chǎn)品屬性
- 產(chǎn)品編號(hào):
DS34T101GN+
- 制造商:
Analog Devices Inc./Maxim Integrated
- 類別:
集成電路(IC) > 專用 IC
- 包裝:
托盤
- 描述:
IC TDM 484TEBGA
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
MAXIM/美信 |
23+ |
TEBGA- 484 |
26680 |
原裝正品 支持實(shí)單 |
詢價(jià) | ||
Maxim Integrated |
24+ |
484-TEBGA(23x23) |
38520 |
一級(jí)代理/放心采購(gòu) |
詢價(jià) | ||
MAXIM/美信 |
24+ |
TEBGA- 484 |
7188 |
秉承只做原裝 終端我們可以提供技術(shù)支持 |
詢價(jià) | ||
MAXIM/美信 |
23+ |
TEBGA- 484 |
30000 |
原裝正品公司現(xiàn)貨,假一賠十! |
詢價(jià) | ||
MAXIMINTEGRA |
22+ |
484-BGA裸露焊盤 |
5000 |
絕對(duì)進(jìn)口原裝現(xiàn)貨 |
詢價(jià) | ||
MAXIM |
852 |
BGA484 |
3 |
一級(jí)代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價(jià) | ||
MAXIM/美信 |
23+ |
TEBGA- 484 |
5000 |
全新原裝現(xiàn)貨 |
詢價(jià) | ||
MAXIM |
19+ |
BGA484 |
256800 |
原廠代理渠道,每一顆芯片都可追溯原廠; |
詢價(jià) | ||
MAXIM/美信 |
23+ |
BGA |
3000 |
一級(jí)代理原廠VIP渠道,專注軍工、汽車、醫(yī)療、工業(yè)、 |
詢價(jià) | ||
MAXIM |
22+23+ |
BGA484 |
22558 |
絕對(duì)原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價(jià) |