DS1350W集成電路（IC）的存儲器規(guī)格書PDF中文資料

DESCRIPTION

The DS1350W 3.3V 4096K Nonvolatile SRAM is a 4,194,304–bit, fully static, nonvolatile SRAM organized as 524,288 words by eight bits. Each NV SRAM has a self–contained lithium energy source and control circuitry which constantly monitors VCC for an out–of–tolerance condition. When such a condition occurs, the lithium energy source is automatically switched on and write protection is unconditionally enabled to prevent data corruption. Additionally, the DS1350W has dedicated circuitry for monitoring the status of VCC and the status of the internal lithium battery.

FEATURES

? 10 years minimum data retention in the absence of external power

? Data is automatically protected during power loss

? Power supply monitor resets processor when VCC power loss occurs and holds processor in reset during VCC ramp–up

? Battery monitor checks remaining capacity daily

? Read and write access times as fast as 150 ns

? Unlimited write cycle endurance

? Typical standby current 50 μA

? Upgrade for 512K x 8 SRAM, EEPROM or Flash

? Lithium battery is electrically disconnected to retain freshness until power is applied for the first time

? Optional industrial temperature range of –40°C to +85°C, designated IND

? New PowerCap Module (PCM) package

– Directly surface–mountable module

– Replaceable snap–on PowerCap provides lithium backup battery

– Standardized pinout for all nonvolatile SRAM products

– Detachment feature on PowerCap allows easy removal using a regular screwdriver