DAC1627D1G25開(kāi)發(fā)板套件編程器的評(píng)估板-數(shù)模轉(zhuǎn)換器（DAC）規(guī)格書(shū)PDF中文資料

Features and benefits

Dual-channel 16-bit resolution

1.25 Gsps maximum update rate

Selectable ×2, ×4 and ×8 interpolation

filters

Low noise capacitor-free integrated

Phase-Locked Loop (PLL)

Embedded Numerically Controlled

Oscillator (NCO) with 40-bit

programmable frequency

Embedded complex (I/Q) modulator

Two power supplies

LVDS DDR compatible input interface

with on-chip 100 W terminations

LVDS DDR input clock up to 400 MHz

LVDS or LVPECL compatible DAC clock

Interleaved or folded I and Q data input mode

Synchronization of multiple DAC

devices

3-wire or 4-wire mode SPI interface

Differential scalable output current from

8.1 mA to 34 mA

External analog offset control

(10-bit auxiliary DACs)

High resolution internal digital gain and

offset control to support high

performance IQ-modulator image

rejection

Internal phase correction

Inverse (sin x) / x function

Power-down mode and Sleep mode;

5-bit NCO low-power mode

On-chip 1.25 V reference

Industrial temperature range ?40 °C to +85 °C

72 pins small form factor HVQFN package