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CY7C402-25PC中文資料賽普拉斯數(shù)據(jù)手冊PDF規(guī)格書

CY7C402-25PC
廠商型號

CY7C402-25PC

功能描述

64 x 4 Cascadable FIFO / 64 x 5 Cascadable FIFO

文件大小

270.78 Kbytes

頁面數(shù)量

13

生產(chǎn)廠商 CypressSemiconductor
企業(yè)簡稱

Cypress賽普拉斯

中文名稱

賽普拉斯半導(dǎo)體公司官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2024-11-8 19:56:00

CY7C402-25PC規(guī)格書詳情

Functional Description

The CY7C401 and CY7C403 are asynchronous first-in first-out (FIFOs) organized as 64 four-bit words. The CY7C402 and CY7C404 are similar FIFOs organized as 64 five-bit words. Both the CY7C403 and CY7C404 have an output enable (OE) function.

Features

? 64 x 4 (CY7C401 and CY7C403) 64 x 5 (CY7C402 and CY7C404) High-speed first-in first-out memory (FIFO)

? Processed with high-speed CMOS for optimum speed/power

? 25-MHz data rates

? 50-ns bubble-through time—25 MHz

? Expandable in word width and/or length

? 5-volt power supply ± 10 tolerance, both commercial and military

? Independent asynchronous inputs and outputs

? TTL-compatible interface

? Output enable function available on CY7C403 and CY7C404

? Capable of withstanding greater than 2001V electrostatic discharge

? Pin compatible with MMI 67401A/67402A

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35830
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CYPRESS(賽普拉斯)
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Cypress
21+
13880
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CYPRESS
23+
DIP
9526
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CY
21+
PDIP18
70
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SPANSION(飛索)
2021+
FCBGA-361(21x21)
499
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CYPRESS
23+
BGA324
30000
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CYPRESS
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56629
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25000
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CYPRESS/賽普拉斯
1936+
FBGA
6852
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