CY62128V18LL-200ZRC中文資料賽普拉斯數據手冊PDF規(guī)格書

Functional Description

The CY62128V family is composed of three high-performance CMOS static RAMs organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE1), an active HIGH Chip Enable (CE2), an active LOW Output Enable (OE) and three-state drivers. These devices have an automatic power-down feature, reducing the power consumption by over 99 when deselected. The CY62128V family is available in the standard 450-mil-wide SOIC, 32-lead TSOP-I, and STSOP packages.

Features

? Low voltage range:

— 2.7V–3.6V (CY62128V)

— 2.3V–2.7V (CY62128V25)

— 1.6V–2.0V (CY62128V18)

? Low active power and standby power

? Easy memory expansion with CE and OE features

? TTL-compatible inputs and outputs

? Automatic power-down when deselected

? CMOS for optimum speed/power