CS5532-BS集成電路（IC）的模數(shù)轉(zhuǎn)換器（ADC）規(guī)格書PDF中文資料

CS5532-BS屬于集成電路（IC）的模數(shù)轉(zhuǎn)換器（ADC）。由凌云邏輯制造生產(chǎn)的CS5532-BS模數(shù)轉(zhuǎn)換器（ADC）模數(shù)轉(zhuǎn)換器（ADC、A/D 或 A 轉(zhuǎn) D）對模擬信號進(jìn)行采樣，例如由麥克風(fēng)采集的聲音或傳感器的輸出，然后將其轉(zhuǎn)換為數(shù)字信號。一般來說，數(shù)字輸出是二進(jìn)制補碼二進(jìn)制數(shù)，與輸入成比例。輸入類型可能是差分、偽差分或單端輸入。模數(shù)轉(zhuǎn)換器可按照位數(shù)、采樣率、輸入數(shù)、接口、轉(zhuǎn)換器數(shù)和架構(gòu)（例如自適應(yīng)增量、雙斜率、折疊、流水線、SAR、三角積分、兩步式）進(jìn)行選擇。

General Description

The CS5531/32/33/34 are highly integrated ?Σ Analogto-Digital Converters (ADCs) which use charge-balance techniques to achieve 16-bit (CS5531/33) and 24-bit (CS5532/34) performance. The ADCs are optimized for measuring low-level unipolar or bipolar signals in weigh scale, process control, scientific, and medical applications.

Features

? Chopper-stabilized PGIA (Programmable Gain Instrumentation Amplifier, 1x to 64x)

– 12 nV/√Hz @ 0.1 Hz (No 1/f noise) at 64x

– 1200 pA Input Current with Gains >1

? Delta-sigma Analog-to-digital Converter

– Linearity Error: 0.0007 FS

– Noise Free Resolution: Up to 23 bits

? Two- or Four-channel Differential MUX

? Scalable Input Span via Calibration

– ±5 mV to differential ±2.5V

? Scalable VREF Input: Up to Analog Supply

? Simple Three-wire Serial Interface

– SPI? and Microwire? Compatible

– Schmitt Trigger on Serial Clock (SCLK)

? R/W Calibration Registers Per Channel

? Selectable Word Rates: 6.25 to 3,840 Sps

? Selectable 50 or 60 Hz Rejection

? Power Supply Configurations

– VA+ = +5 V; VA- = 0 V; VD+ = +3 V to +5 V

– VA+ = +2.5 V; VA- = -2.5 V; VD+ = +3 V to +5 V

– VA+ = +3 V; VA- = -3 V; VD+ = +3 V