CS5381-KSZR集成電路（IC）的模數(shù)轉(zhuǎn)換器（ADC）規(guī)格書PDF中文資料

CS5381-KSZR屬于集成電路（IC）的模數(shù)轉(zhuǎn)換器（ADC）。由凌云邏輯制造生產(chǎn)的CS5381-KSZR模數(shù)轉(zhuǎn)換器（ADC）模數(shù)轉(zhuǎn)換器（ADC、A/D 或 A 轉(zhuǎn) D）對(duì)模擬信號(hào)進(jìn)行采樣，例如由麥克風(fēng)采集的聲音或傳感器的輸出，然后將其轉(zhuǎn)換為數(shù)字信號(hào)。一般來(lái)說(shuō)，數(shù)字輸出是二進(jìn)制補(bǔ)碼二進(jìn)制數(shù)，與輸入成比例。輸入類型可能是差分、偽差分或單端輸入。模數(shù)轉(zhuǎn)換器可按照位數(shù)、采樣率、輸入數(shù)、接口、轉(zhuǎn)換器數(shù)和架構(gòu)（例如自適應(yīng)增量、雙斜率、折疊、流水線、SAR、三角積分、兩步式）進(jìn)行選擇。

General Description

The CS5381 is a complete analog-to-digital converter for digital audio systems. It performs sampling, analog to-digital conversion, and anti-alias filtering - generating 24-bit values for both left and right inputs in serial form at sample rates up to 216 kHz per channel. The CS5381 uses a 5th-order, multi-bit delta-sigma modulator followed by digital filtering and decimation, which removes the need for an external anti-alias filter. The ADC uses a differential architecture which provides excellent noise rejection.

Features

Advanced Multi-bit Delta-Sigma Architecture

24-bit Conversion

120 dB Dynamic Range

-110 dB THD+N

Supports All Audio Sample Rates Including 192 kHz

260 mW Power Consumption

High-Pass Filter or DC Offset Calibration

Supports Logic Levels between 5 and 2.5 V

Differential Analog Architecture

Low-Latency Digital Filtering

Overflow Detection

Pin-Compatible with the CS5361