CL-PS7110中文資料凌云邏輯數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

OVERVIEW

The CL-PS7110 is designed for ultra-low-power applications such as organizers/PDAs, two-way pagers, smart phones, and hand-held internet browsers. The device’s core-logic functionality is built around an ARM710A microprocessor with 8 Kbytes of four-way set-associative unified cache.

FEATURES

■ Ultra low power

— Designed for applications that require long battery life while using standard AA/AAA batteries

— Average 20 mA in normal operation (everything on)

— Average 5 mA in idle mode (clock to the CPU stopped, everything else running)

— Average 3 μA in standby mode (realtime clock on and everything else stopped)

■ Performance matching 33-MHz Intel? ’486-based PC

— 15 Vax?-MIPS (Dhrystone?) at 18 MHz

■ ARM710A microprocessor

— ARM7 CPU

— 8 Kbytes of four-way set-associative cache

— MMU with 64-entry TLB (transition look-aside buffer)

— Little endian

■ DRAM controller

— Connects up to four banks of DRAM, with each bank being 32 bits wide and up to 256 Mbytes in size

■ ROM/SRAM/flash memory control

— Decodes eight separate memory segments of 256 Mbytes

— Each segment can be configured as 8, 16, or 32 bits wide and support page-mode access

— Programmable access time for conventional SRAM/ROM/flash memory

— Expansion device can also be a PC Card (PCMCIA) controller

■ Codec interface

— Provides all necessary clocks and timing pulses and performs serialization of the data stream (or vice versa) to or from standard telephony codecs

— Data transfer at 64 kbps

■ Synchronous serial interface

— Supports SPI?1 or Microwire?2-compatible interface

■ 36-bit general-purpose I/O

— Four 8-bit and one 4-bit GPIO port

— Supports scanning keyboard matrix

■ 16C550-style UART

— Supports bit rates up to 115.2 kbps

— Contains two 16-byte FIFOs for Tx and Rx

— Supports modem control signals

■ SIR (slow (9600–115.2 kbps) infrared) encoder

— IrDA (Infrared Data Association) SIR protocol encoder can be optionally switched into Tx and Rx signals of the UART up to 115 kbps

■ DC-to-DC converter interface

— Provides two 96-kHz clock outputs, whose duty ratio are programmable (from 1-in-16 to 15-in-16)

■ LCD controller

— Interfaces directly to a single-scan panel monochrome LCD

— Panel size is programmable and is any width (line length) from 16 to 1024 pixels in 16-pixel increments

— Video frame size programmable up to 128 Kbytes

— Bits per pixel programmable from 1, 2, or 4

— Two 32-bit palette registers to support 4-, 2-, or 1-bit pixel values for mapping to any of the 16 grayscale values

■ Two timer counters

■ Realtime clock (32-bit)