CD74HC112PWR集成電路（IC）的觸發(fā)器規(guī)格書PDF中文資料

CD74HC112PWR屬于集成電路（IC）的觸發(fā)器。由德州儀器制造生產(chǎn)的CD74HC112PWR觸發(fā)器觸發(fā)器是能夠存儲單個邏輯狀態(tài)或信息“位”的基本數(shù)字存儲器件。這些器件至少有兩個輸入；一個或多個用于傳遞要存儲的數(shù)據(jù)，另一個用于指示存儲該數(shù)據(jù)的時間點。不同的觸發(fā)器類型，例如 D（延遲）、SR（置位復(fù)位）和 JK，對提供給其輸入的信號有不同的響應(yīng)，可用于實現(xiàn)不同的邏輯功能。這些器件與鎖存器的不同之處在于它們是邊緣敏感器件，其保持的邏輯狀態(tài)僅在接收到有效時鐘信號時才會改變。

1 Features

? Hysteresis on clock inputs for improved noise

immunity and increased input rise and fall times

? Asynchronous set and reset

? Complementary outputs

? Buffered inputs

? Typical fMAX = 60 MHz at VCC = 5 V, CL = 15 pF, TA

= 25℃

? Fanout (over temperature range)

– Standard outputs: 10 LSTTL loads

– Bus driver outputs: 15 LSTTL loads

? Wide operating temperature range: -55℃ to 125℃

? Balanced propagation delay and transition times

? Significant power reduction compared to LSTTL

Logic ICs

? HC types

– 2 V to 6 V operation

– High noise immunity: NIL = 30, NIH = 30 of

VCC at VCC = 5 V

? HCT types

– 4.5 V to 5.5 V operation

– Direct LSTTL input logic compatibility, VIL = 0.8

V (max), VIH = 2 V (min)

– CMOS input compatibility, II ≤ 1 μA at VOL, VOH

2 Description

The ’HC112 and ’HCT112 utilize silicon-gate CMOS

technology to achieve operating speeds equivalent to

LSTTL parts. They exhibit the low power consumption

of standard CMOS integrated circuits, together with

the ability to drive 10 LSTTL loads.

These flip-flops have independent J, K, PRE, CLR,

and Clock inputs and Q and Q outputs. They

change state on the negative-going transition of

the clock pulse. PRE and CLR are accomplished

asynchronously by low-level inputs.

The HCT logic family is functionally as well as pin

compatible with the standard LS logic family.