CD4000中文資料Intersil數(shù)據(jù)手冊PDF規(guī)格書

Description

CD4000BMS - Dual 3 Plus Inverter

CD4001BMS - Quad 2 Input

CD4002BMS - Dual 4 Input

CD4025BMS - Triple 3 Input

CD4000BMS, CD4001BMS, CD4002BMS, and CD4025BMS NOR gates provide the system designer with direct implementation of the NOR function and supplement the existing family of CMOS gates. All inputs and outputs are buffered.

Features

? High-Voltage Types (20V Rating)

? Propagation Delay Time = 60ns (typ.) at CL = 50pF, VDD = 10V

? Buffered Inputs and Outputs

? Standard Symmetrical Output Characteristics

? 100 Tested for Maximum Quiescent Current at 20V

? 5V, 10V and 15V Parametric Ratings

? Maximum Input Current of 1μA at 18V Over Full Package-Temperature Range; 100nA at 18V and +25oC

? Noise Margin (Over Full Package Temperature Range):

?? - 1V at VDD = 5V

?? - 2V at VDD = 10V

?? - 2.5V at VDD = 15V

? Meets All Requirements of JEDEC Tentative Standards No. 13B, “Standard Specifications for Description of “B” Series CMOS Device’s

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