CAT5261UI-50TE13中文資料Catalyst數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

DESCRIPTION

The CAT5261 is two Digitally Programmable Potentiometers (DPPs?) integrated with control logic and 8 bytes of NVRAM memory. Each DPP consists of a series of resistive elements connected between two externally accessible end points. The tap points between each resistive element are connected to the wiper outputs with CMOS switches. A separate 8-bit control register (WCR) independently controls the wiper tap switches for each DPP. Associated with each wiper control register are four 8-bit non-volatile memory data registers (DR) used for storing up to four wiper settings. Writing to the wiper control register or any of the non-volatile data registers is via a SPI serial bus. On power-up, the contents of the first data register (DR0) for each of the potentiometers is automatically loaded into its respective wiper control register.

FEATURES

■ Two linear-taper digitally programmable potentiometers

■ 256 resistor taps per potentiometer

■ End to end resistance 50k? or 100k?

■ Potentiometer control and memory access via SPI interface

■ Low wiper resistance, typically 100?

■ Nonvolatile memory storage for up to four wiper settings for each potentiometer

■ Automatic recall of saved wiper settings at power up

■ 2.5 to 6.0 volt operation

■ Standby current less than 1μA

■ 1,000,000 nonvolatile WRITE cycles

■ 100 year nonvolatile memory data retention

■ 24-lead SOIC and 24-lead TSSOP

■ Industrial temperature range