General Description

The BU90R104 receiver operates from 8MHz to 112MHz wide clock range.

The BU90R104 converts the LVDS serial data streams back into 35bits of LVCMOS parallel data.

Data is transmitted seven times (7X) stream and reduce the cable number by 3(1/3) or less.

I/O Voltage range is 2.3 to 3.6V,so it is available for many products.

● Features

■ 5 channels of LVDS data stream are converted to 35bits data of parallel LVCMOS level outputs.

■ 30bits of RGB output data, 5bits of timing and control output data(HSYNC, VSYNC, DE, CTL1 and CTL2) are transmitted available.

■ Support clock frequency from 8MHz up to 112MHz.

■ Support consumer video format including 480i, 480P, 720P and 1080i as well.

■ Support many kinds of PC video formats such as VGA, SVGA, XGA and SXGA.

■ Provide 784Mbps per 1ch or 3.92Gbps per device throughput rate using 112MHz clock rate.

■ User programmable LVCMOS data output triggering timing by using either rising or falling edge of clock.

■ 30bit LVDS transmitter is recommended to use BU8254KVT.

● Applications

■ Flat panel display

■ Security camera, Digital camera

■ Tablet

BU90R104-E2屬于集成電路（IC） > 串行器，解串器。羅姆半導(dǎo)體集團(tuán)制造生產(chǎn)的BU90R104-E2串行器，解串器串行器將并行提供的信息轉(zhuǎn)換為較高符號(hào)率的串行數(shù)據(jù)流，從而減少數(shù)字信息傳輸所需的導(dǎo)線數(shù)量；解串器執(zhí)行相反的功能。常用于在圖像傳感器、圖像處理器和顯示器之間傳輸視頻數(shù)據(jù)，還有針對工業(yè) I/O 設(shè)備等其他應(yīng)用而定制的器件。