AT32UC3L0128-ZAUT中文資料愛(ài)特梅爾數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

Description

The Atmel? AVR? AT32UC3L0128/256 is a complete system-on-chip microcontroller based on the AVR32 UC RISC processor running at frequencies up to 50MHz. AVR32 UC is a high-performance 32-bit RISC microprocessor core, designed for cost-sensitive embedded applications, with particular emphasis on low power consumption, high code density, and high performance.

The processor implements a Memory Protection Unit (MPU) and a fast and flexible interrupt controller for supporting modern and real-time operating systems. The Secure Access Unit (SAU) is used together with the MPU to provide the required security and integrity.

Features

? High-performance, Low-power 32-bit Atmel? AVR? Microcontroller

– Compact Single-cycle RISC Instruction Set Including DSP Instructions

– Read-modify-write Instructions and Atomic Bit Manipulation

– Performance

? Up to 64DMIPS Running at 50MHz from Flash (1 Flash Wait State)

? Up to 36DMIPS Running at 25MHz from Flash (0 Flash Wait State)

– Memory Protection Unit (MPU)

? Secure Access Unit (SAU) providing User-defined Peripheral Protection

? picoPower? Technology for Ultra-low Power Consumption

? Multi-hierarchy Bus System

– High-performance Data Transfers on Separate Buses for Increased Performance

– 12 Peripheral DMA Channels Improve Speed for Peripheral Communication

? Internal High-speed Flash

– 256Kbytes and 128Kbytes Versions

– Single-cycle Access up to 25MHz

– FlashVault Technology Allows Pre-programmed Secure Library Support for End User Applications

– Prefetch Buffer Optimizing Instruction Execution at Maximum Speed

– 100,000 Write Cycles, 15-year Data Retention Capability

– Flash Security Locks and User-defined Configuration Area

? Internal High-speed SRAM, Single-cycle Access at Full Speed

– 32Kbytes

? Interrupt Controller (INTC)

– Autovectored Low-latency Interrupt Service with Programmable Priority

? External Interrupt Controller (EIC)

? Peripheral Event System for Direct Peripheral to Peripheral Communication

? System Functions

– Power and Clock Manager

– SleepWalking Power Saving Control

– Internal System RC Oscillator (RCSYS)

– 32 KHz Oscillator

– Multipurpose Oscillator, Phase Locked Loop (PLL), and Digital Frequency Locked Loop (DFLL)

? Windowed Watchdog Timer (WDT)

? Asynchronous Timer (AST) with Real-time Clock Capability

– Counter or Calendar Mode Supported

? Frequency Meter (FREQM) for Accurate Measuring of Clock Frequency

? Six 16-bit Timer/Counter (TC) Channels

– External Clock Inputs, PWM, Capture, and Various Counting Capabilities

? PWM Channels on All I/O Pins (PWMA)

– 8-bit PWM with a Source Clock up to 150MHz

? Four Universal Synchronous/Asynchronous Receiver/Transmitters (USART)

– Independent Baudrate Generator, Support for SPI

– Support for Hardware Handshaking

? One Master/Slave Serial Peripheral Interface (SPI) with Chip Select Signals

– Up to 15 SPI Slaves can be Addressed

? Two Master and Two Slave Two-wire Interfaces (TWI), 400kbit/s I2C-compatible

? One 8-channel Analog-to-digital Converter (ADC) with up to 12 Bits Resolution

– Internal Temperature Sensor

? Eight Analog Comparators (AC) with Optional Window Detection

? Capacitive Touch (CAT) Module

– Hardware-assisted Atmel? AVR? QTouch? and Atmel? AVR? QMatrix Touch Acquisition

– Supports QTouch and QMatrix Capture from Capacitive Touch Sensors

? QTouch Library Support

– Capacitive Touch Buttons, Sliders, and Wheels

– QTouch and QMatrix Acquisition

? On-chip Non-intrusive Debug System

– Nexus Class 2+, Runtime Control, Non-intrusive Data and Program Trace

– aWire Single-pin Programming Trace and Debug Interface Muxed with Reset Pin

– NanoTrace Provides Trace Capabilities through JTAG or aWire Interface

? 48-pin TQFP/QFN/TLLGA (36 GPIO Pins)

? Five High-drive I/O Pins

? Single 1.62-3.6 V Power Supply