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ASM25512C中文資料APLUS數(shù)據(jù)手冊PDF規(guī)格書

ASM25512C
廠商型號

ASM25512C

功能描述

VERY LOW-COST VOICE SYNTHESIZER WITH 4-BIT MICROPROCESSOR

文件大小

617.46 Kbytes

頁面數(shù)量

7

生產(chǎn)廠商 Aplus Intergrated Circuits
企業(yè)簡稱

APLUS

中文名稱

Aplus Intergrated Circuits官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-2-28 17:32:00

人工找貨

ASM25512C價格和庫存,歡迎聯(lián)系客服免費(fèi)人工找貨

ASM25512C規(guī)格書詳情

General Description

The ASM25512C is very low cost voice synthesizer with 4-bit microprocessor. It has various features including 4-bit ALU, ROM, RAM, I/O ports, timers, clock generator, watchdog timer(WDT), voice synthesizer, etc. It consists of 22 instructions in the device. With CMOS technology and halt function can minimize power dissipation. Its architecture is similar to RISC, with two stages of instruction pipeline. It allows all instructions to be executed in a single cycle, except for program branches and data table read instructions (which need two instruction cycles).

Feature

◆ Single power supply can operate from 2.4V through 5.5V

◆ Internal Program ROM: 4K x 10-bit

◆ 1 sets of 20-bit DPR can access up to 768K x 10 bits data memory space

◆ Data Registers:

? 96 x 4-bit data RAM (00-1Fh plus 40h-7Fh)

? Unbanked special function registers (SFR) range: 20h-3Fh

◆ I/O Ports:

? PRA: 4-bit I/O Port A (2Bh)

? PRB: 4-bit Output Port B (2Dh)

? PRC: 4-bit Input Port C (2Fh)

◆ On-chip clock generator: Resistive Clock Drive(RM)

◆ Timer: 1

? Timer0: a 9-bit auto-reload timer/counter

◆ Stack: 2-level subroutine nesting

◆ HALT and Release from HALT function to reduce power consumption

◆ Watch Dog Timer (WDT)

◆ Instruction: 1-cycle instruction except for table read and program branches which are 2-cycles

◆ Number of instruction: 22

◆ The Voice function can be implemented by microprocessor instruction

? One 8-bit COUT output for ASM25512C

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