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AS7C33128PFD32A-133TQC中文資料ALSC數(shù)據(jù)手冊(cè)PDF規(guī)格書
| 廠商型號(hào) |
AS7C33128PFD32A-133TQC |
| 功能描述 | 3.3V 128K X 32/36 pipeline burst synchronous SRAM |
| 文件大小 |
227.59 Kbytes |
| 頁面數(shù)量 |
11 頁 |
| 生產(chǎn)廠商 | Alliance Semiconductor Corporation |
| 企業(yè)簡(jiǎn)稱 |
ALSC |
| 中文名稱 | Alliance Semiconductor Corporation官網(wǎng) |
| 原廠標(biāo)識(shí) |  |
| 數(shù)據(jù)手冊(cè) | |
| 更新時(shí)間 | 2025-1-1 15:00:00 |
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AS7C33128PFD32A-133TQC規(guī)格書詳情
Functional description
The AS7C33128PFD32A and AS7C33128PFD36A are high-performance CMOS 4-Mbit synchronous Static Random Access Memory (SRAM) devices organized as 131,072 words × 32 or 36 bits, and incorporate a two-stage register-register pipeline for highest frequency on any given technology.
Features
? Organization: 131,072 words × 32 or 36 bits
? Fast clock speeds to 166 MHz in LVTTL/LVCMOS
? Fast clock to data access: 3.5/3.8/4.0/5.0 ns
? Fast OE access time: 3.5/3.8/4.0/5.0 ns
? Fully synchronous register-to-register operation
? Single register “Flow-through” mode
? Dual-cycle deselect
- Single-cycle deselect also available (AS7C33128PFS32A/AS7C33128PFS36A)
? Pentium?* compatible architecture and timing
? Asynchronous output enable control
? Economical 100-pin TQFP package
? Byte write enables
? Multiple chip enables for easy expansion
? 3.3 core power supply
? 2.5V or 3.3V I/O operation with separate VDDQ
? 30 mW typical standby power in power down mode
? NTD?* pipeline architecture available (AS7C33128KNTD32A/ AS7C33128NTD36A)
產(chǎn)品屬性
- 型號(hào)：
AS7C33128PFD32A-133TQC
- 制造商：
ALSC
- 制造商全稱：
Alliance Semiconductor Corporation
- 功能描述：
3.3V 128K X 32/36 pipeline burst synchronous SRAM
