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AS7C1025-20JC中文資料ALSC數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

AS7C1025-20JC
廠商型號(hào)

AS7C1025-20JC

功能描述

5V/3.3V 128K x8 CMOS SRAM (Revolutionary pinout)

文件大小

196.16 Kbytes

頁(yè)面數(shù)量

9 頁(yè)

生產(chǎn)廠商 Alliance Semiconductor Corporation
企業(yè)簡(jiǎn)稱

ALSC

中文名稱

Alliance Semiconductor Corporation官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2024-11-19 13:40:00

AS7C1025-20JC規(guī)格書(shū)詳情

Functional description

The AS7C1025 and AS7C31025 are high-performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) devices organized as 131,072 words × 8 bits. They are designed for memory applications where fast data access, low power, and simple interfacing are desired.

Equal address access and cycle times (tAA, tRC, tWC) of 12/15/20 ns with output enable access times (tOE) of 6,7,8 ns are ideal for high-performance applications. The chip enable input CE permits easy memory and expansion with multiple-bank memory systems.

Features

? AS7C1025 (5V version)

? AS7C31025 (3.3V version)

? Industrial and commercial temperatures

? Organization: 131,072 words × 8 bits

? High speed

- 12/15/20 ns address access time

- 6,7,8 ns output enable access time

? Low power consumption: ACTIVE

- 715 mW (AS7C1025) / max @ 12 ns (5V)

- 360 mW (AS7C31025) / max @ 12 ns (3.3V)

? Low power consumption: STANDBY

- 27.5 mW (AS7C1025) / max CMOS (5V)

- 1.8 mW (AS7C31025) / max CMOS (3.3V)

? 2.0V data retention

? Easy memory expansion with CE, OE inputs

? Center power and ground

? TTL/LVTTL-compatible, three-state I/O

? JEDEC-standard packages

- 32-pin, 300 mil SOJ

- 32-pin, 400 mil SOJ

- 32-pin TSOP II

? ESD protection ≥ 2000 volts

? Latch-up current ≥ 200 mA

產(chǎn)品屬性

  • 型號(hào):

    AS7C1025-20JC

  • 制造商:

    ALSC

  • 制造商全稱:

    Alliance Semiconductor Corporation

  • 功能描述:

    5V/3.3V 128K x8 CMOS SRAM(Revolutionary pinout)

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