APW7055中文資料茂達(dá)電子數(shù)據(jù)手冊(cè)PDF規(guī)格書

General Description

The APW7055 provides the power control and protections for two output voltages on M/B DDR applications. It integrates one PWM controller , one source-sink linear controller(LC) for DDR source-sink purpose, as well as the monitor and protection functions into a single package. The PWM controller supplies the VMEM(2.5V) with a standard buck converter. The source-sink linear controller regulates VTT(1.25V) power for DDR Termination.

Additional built-in over-voltage protection (OVP) will be started when the VMEM output is above 115 of the internal DAC setting(VDAC) . OVP function will shut down the upper MOSFET and disable all output voltage . The PWM controller’s over-current function monitors the output current by sensing the voltage drop across the upper MOSFET‘s rDS(ON) , eliminating the need for a current sensing resistor .

Features

? Operates from 5V input supply

? 2 Regulated Voltage are provided

? Standard Buck Switching Power for VMEM (2.5V)

? Linear Controller with Source-Sink Regulation for VTT(1.25V)

? Simple Single-Loop Control Design

? Voltage-Mode PWM Control

? Excellent Output Voltage Regulation

? VMEM Output : VMEM ±1.5 Over Tem-perature

? VTT Output : 1/2 VIN ±25mV Over Temperature

? Fast Transient Response

? Built-in Feedback Compensation

? Full 0 to 100 Duty Ratio

? Over-Voltage and Over-Current Fault Monitors

? Constant Frequency Operation(200kHz)

? 16 pins, SSOP Package

Applications

? M/B DDR Power Regulation

? AGP/PCI Graphics Power Regulation

? SSTL-2 Termination