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APA1000-FG896A中文資料Actel數(shù)據(jù)手冊(cè)PDF規(guī)格書
APA1000-FG896A規(guī)格書詳情
Device Family Overview
The ProASICPLUS family of devices, Actel’s second generation family of flash FPGAs, offers enhanced performance over Actel’s ProASIC family. It combines the advantages of ASICs with the benefits of programmable devices through nonvolatile flash technology.
Features and Benefits
High Capacity
Commercial and Industrial
? 75,000 to 1 Million System Gates
? 27 K to 198 Kbits of Two-Port SRAM
? 66 to 712 User I/Os
Military
? 300, 000 to 1 Million System Gates
? 72 K to 198 Kbits of Two Port SRAM
? 158 to 712 User I/Os
Reprogrammable Flash Technology
? 0.22 μm 4 LM Flash-Based CMOS Process
? Live At Power-Up (LAPU) Level 0 Support
? Single-Chip Solution
? No Configuration Device Required
? Retains Programmed Design during Power-Down/Up Cycles
? Mil/Aero Devices Operate over Full Military Temperature Range
Performance
? 3.3 V, 32-Bit PCI, up to 50 MHz (33 MHz over military temperature)
? Two Integrated PLLs
? External System Performance up to 150 MHz
Secure Programming
? The Industry’s Most Effective Security Key (FlashLock?)
Low Power
? Low Impedance Flash Switches
? Segmented Hierarchical Routing Structure
? Small, Efficient, Configurable (Combinatorial or Sequential) Logic Cells
High Performance Routing Hierarchy
? Ultra-Fast Local and Long-Line Network
? High-Speed Very Long-Line Network
? High-Performance, Low Skew, Splittable Global Network
? 100 Routability and Utilization
I/O
? Schmitt-Trigger Option on Every Input
? 2.5 V / 3.3 V Support with Individually-Selectable Voltage and Slew Rate
? Bidirectional Global I/Os
? Compliance with PCI Specification Revision 2.2
? Boundary-Scan Test IEEE Std. 1149.1 (JTAG) Compliant
? Pin-Compatible Packages across the ProASICPLUS Family
Unique Clock Conditioning Circuitry
? PLL with Flexible Phase, Multiply/Divide, and Delay Capabilities
? Internal and/or External Dynamic PLL Configuration
? Two LVPECL Differential Pairs for Clock or Data Inputs
Standard FPGA and ASIC Design Flow
? Flexibility with Choice of Industry-Standard Front-End Tools
? Efficient Design through Front-End Timing and Gate Optimization
ISP Support
? In-System Programming (ISP) via JTAG Port
SRAMs and FIFOs
? SmartGen Netlist Generation Ensures Optimal Usage of Embedded Memory Blocks
? 24 SRAM and FIFO Configurations with Synchronous and Asynchronous Operation up to 150 MHz (typical)
產(chǎn)品屬性
- 型號(hào)：
APA1000-FG896A
- 功能描述：
IC FPGA PROASIC+ 1M 896-FBGA
- RoHS：
否
- 類別：
集成電路(IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列）
- 系列：
ProASICPLUS
- 標(biāo)準(zhǔn)包裝：
1
- LAB/CLB數(shù)：
-
- 邏輯元件/單元數(shù)：
- RAM
- 位總計(jì)：
129024
- 輸入/輸出數(shù)：
248
- 門數(shù)：
600000
- 電源電壓：
2.3 V ~ 2.7 V
- 安裝類型：
表面貼裝
- 工作溫度：
-
- 封裝/外殼：
352-BFCQFP，帶拉桿
- 供應(yīng)商設(shè)備封裝：
352-CQFP（75x75）
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
ACTEL |
20+ |
原廠封裝 |
6965 |
英卓爾原裝現(xiàn)貨!0755-82566558真實(shí)庫(kù)存! |
詢價(jià) | ||
Microchip / Microsemi |
20+ |
FBGA |
29860 |
Microchip全新FPGA-可開原型號(hào)增稅票 |
詢價(jià) | ||
Microsemi Corporation |
21+ |
896FBGA (31x31) |
13880 |
公司只售原裝,支持實(shí)單 |
詢價(jià) | ||
ACTEL |
22+ |
FBGA896 |
10000 |
原裝正品優(yōu)勢(shì)現(xiàn)貨供應(yīng) |
詢價(jià) | ||
ACTEL |
三年內(nèi) |
1983 |
只做原裝正品 |
詢價(jià) | |||
MSC |
2021+ |
20 |
100500 |
一級(jí)代理專營(yíng)品牌!原裝正品,優(yōu)勢(shì)現(xiàn)貨,長(zhǎng)期排單到貨 |
詢價(jià) | ||
MICROSEMI |
2022+ |
原廠原包裝 |
8600 |
全新原裝 支持表配單 中國(guó)著名電子元器件獨(dú)立分銷 |
詢價(jià) | ||
Microsemi Corporation |
23+ |
896-FBGA31x31 |
7300 |
專注配單,只做原裝進(jìn)口現(xiàn)貨 |
詢價(jià) | ||
Microsemi Corporation |
23+ |
896-FBGA31x31 |
7300 |
專注配單,只做原裝進(jìn)口現(xiàn)貨 |
詢價(jià) | ||
MICROSEMI |
638 |
原裝正品 |
詢價(jià) |
