AM29F200BT-70中文資料超威半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

GENERAL DESCRIPTION

The Am29F200B is a 2 Mbit, 5.0 Volt-only Flash memory organized as 262,144 bytes or 131,072 words. The 8 bits of data appear on DQ0–DQ7; the 16 bits on DQ0–DQ15. The Am29F200B is offered in 44-pin SO and 48-pin TSOP packages. The device is also available in Known Good Die (KGD) form. For more information, refer to publication number 21257. This device is designed to be programmed in-system with the standard system 5.0 volt VCC supply. A 12.0 volt VPP is not required for program or erase operations. The device can also be reprogrammed in standard EPROM programmers.

DISTINCTIVE CHARACTERISTICS

■ 5.0 V ± 10 for read and write operations

— Minimizes system level power requirements

■ Manufactured on 0.32 μm process technology

— Compatible with 0.5 μm Am29F200A device

■ High performance

— Access times as fast as 45 ns

■ Low power consumption

— 20 mA typical active read current (byte mode)

— 28 mA typical active read current for (word mode)

— 30 mA typical program/erase current

— 1 μA typical standby current

■ Sector erase architecture

— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and three 64 Kbyte sectors (byte mode)

— One 8 Kword, two 4 Kword, one 16 Kword, and three 32 Kword sectors (word mode)

— Supports full chip erase

— Sector Protection features:

A hardware method of locking a sector to prevent any program or erase operations within that sector

Sectors can be locked via programming equipment Temporary Sector Unprotect feature allows code changes in previously locked sectors

■ Top or bottom boot block configurations available

■ Embedded Algorithms

— Embedded Erase algorithm automatically preprograms and erases the entire chip or any combination of designated sectors

— Embedded Program algorithm automatically writes and verifies data at specified addresses

■ Minimum 1,000,000 write/erase cycles guaranteed

■ 20-year data retention at 125°C

— Reliable operation for the life of the system

■ Package options

— 44-pin SO

— 48-pin TSOP

— Known Good Die (KGD) (see publication number 21257)

■ Compatible with JEDEC standards

— Pinout and software compatible with single-power-supply flash

— Superior inadvertent write protection

■ Data# Polling and Toggle Bit

— Detects program or erase cycle completion

■ Ready/Busy# output (RY/BY#)

— Hardware method for detection of program or erase cycle completion

■ Erase Suspend/Erase Resume

— Supports reading data from a sector not being erased

■ Hardware RESET# pin

— Resets internal state machine to the reading array data