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ADS6443集成電路(IC)的模數(shù)轉(zhuǎn)換器(ADC)規(guī)格書PDF中文資料

ADS6443
廠商型號(hào)

ADS6443

參數(shù)屬性

ADS6443 封裝/外殼為64-VFQFN 裸露焊盤;包裝為托盤;類別為集成電路(IC)的模數(shù)轉(zhuǎn)換器(ADC);產(chǎn)品描述:IC ADC 14BIT PIPELINED 64VQFN

功能描述

QUAD CHANNEL, 14-BIT, 125/105/80/65 MSPS ADC WITH SERIAL LVDS OUTPUTS

文件大小

2.83808 Mbytes

頁面數(shù)量

75

生產(chǎn)廠商 STMicroelectronics
企業(yè)簡稱

STMICROELECTRONICS意法半導(dǎo)體

中文名稱

意法半導(dǎo)體集團(tuán)官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

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更新時(shí)間

2025-1-3 17:24:00

ADS6443規(guī)格書詳情

DESCRIPTION

The ADS6445/ADS6444/ADS6443/ADS6442 (ADS644X) is a family of high performance 14-bit 125/105/80/65 MSPS quad channel A-D converters. Serial LVDS data outputs reduce the number of interface lines, resulting in a compact 64-pin QFN package (9 mm × 9 mm) that allows for high system integration density. The device includes 3.5dB coarse gain option that can be used to improve SFDR performance with little degradation in SNR. In addition to the coarse gain, fine gain options also exist, programmable in 1dB steps up to 6dB.

The output interface is 2-wire, where each ADC data is serialized and output over two LVDS pairs. This makes it possible to halve the serial data rate (compared to a 1-wire interface) and restrict it to less than 1Gbps easing receiver design. The ADS644X also includes the traditional 1-wire interface that can be used at lower sampling frequencies.

An internal phase lock loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock. The bit clock is used to serialize the 14-bit data from each channel. In addition to the serial data streams, the frame and bit clocks are also transmitted as LVDS outputs.

The LVDS output buffers have features such as programmable LVDS currents, current doubling modes and internal termination options. These can be used to widen eye-openings and improve signal integrity, easing capture by the receiver.

The ADC channel outputs can be transmitted either as MSB or LSB first and 2s complement or straight binary.

FEATURES

? Maximum Sample Rate: 125 MSPS

? 14-Bit Resolution with No Missing Codes

? Simultaneous Sample and Hold

? 3.5dB Coarse Gain and up to 6dB

Programmable Fine Gain for SFDR/SNR

Trade-Off

? Serialized LVDS Outputs with Programmable

Internal Termination Option

? Supports Sine, LVCMOS, LVPECL, LVDS

Clock Inputs and Amplitude down to 400 mVPP

? Internal Reference with External Reference

Support

? No External Decoupling Required for

References

? 3.3-V Analog and Digital Supply

? 64 QFN Package (9 mm × 9 mm)

? Pin Compatible 12-Bit Family (ADS642X -

SLAS532)

? Feature Compatible Dual Channel Family

(ADS624X - SLAS542, ADS644X - SLAS543)

APPLICATIONS

? Base-Station IF Receivers

? Diversity Receivers

? Medical Imaging

? Test Equipment

產(chǎn)品屬性

  • 產(chǎn)品編號(hào):

    ADS6443IRGC25

  • 制造商:

    Texas Instruments

  • 類別:

    集成電路(IC) > 模數(shù)轉(zhuǎn)換器(ADC)

  • 包裝:

    托盤

  • 位數(shù):

    14

  • 采樣率(每秒):

    80M

  • 輸入數(shù):

    4

  • 輸入類型:

    差分

  • 數(shù)據(jù)接口:

    LVDS - 串行

  • 配置:

    S/H-ADC

  • 比率 - S/H:

    1:1

  • 架構(gòu):

    管線

  • 參考類型:

    外部,內(nèi)部

  • 電壓 - 供電,模擬:

    3V ~ 3.6V

  • 電壓 - 供電,數(shù)字:

    3V ~ 3.6V

  • 特性:

    同步采樣

  • 工作溫度:

    -40°C ~ 85°C

  • 封裝/外殼:

    64-VFQFN 裸露焊盤

  • 供應(yīng)商器件封裝:

    64-VQFN(9x9)

  • 安裝類型:

    表面貼裝型

  • 描述:

    IC ADC 14BIT PIPELINED 64VQFN

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫存 備注 價(jià)格
TI
21+
QFN-64
3
原裝現(xiàn)貨假一賠十
詢價(jià)
TI
21+
64VQFN
13880
公司只售原裝,支持實(shí)單
詢價(jià)
TI/德州儀器
23+
NA
90000
一定原裝正品
詢價(jià)
TI/德州儀器
23+
NA/
3750
原裝現(xiàn)貨,當(dāng)天可交貨,原型號(hào)開票
詢價(jià)
TI(德州儀器)
23+
QFN64EP(9x9)
7350
現(xiàn)貨供應(yīng),當(dāng)天可交貨!免費(fèi)送樣,原廠技術(shù)支持!!!
詢價(jià)
TI
1735+
QFN-64
6528
科恒偉業(yè)!只做原裝正品!假一賠十!
詢價(jià)
TI
2024+
VQFN-64
16000
原裝優(yōu)勢(shì)絕對(duì)有貨
詢價(jià)
TI/TEXAS
23+
QFN-64
8931
詢價(jià)
TI
21+
QFN-64
3200
公司只做原裝,誠信經(jīng)營
詢價(jià)
TI
22+23+
23259
絕對(duì)原裝全新正品現(xiàn)貨/優(yōu)勢(shì)渠道商、原盤原包原盒
詢價(jià)