AD9854ASVZ集成電路（IC）的直接數(shù)字合成（DDS）規(guī)格書PDF中文資料

AD9854ASVZ屬于集成電路（IC）的直接數(shù)字合成（DDS）。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD9854ASVZ直接數(shù)字合成（DDS）直接數(shù)字合成 (DDS) 用于由數(shù)字信號生成不同頻率的模擬波形。在必須大范圍掃描的無線系統(tǒng)中可用于頻率控制。主時鐘頻率有 5MHz、16MHz、16.776MHz、25MHz、50MHz、75MHz、125MHz、180MHz、200MHz、250MHz、300MHz、400MHz、500MHz、1GHz、2.5GHz 和 3GHz，分辨率為 10 b、12 b 或 14 b。

FEATURES

300 MHz internal clock rate

FSK, BPSK, PSK, chirp, AM operation

Dual integrated 12-bit digital-to-analog converters (DACs)

Ultrahigh speed comparator, 3 ps rms jitter

Excellent dynamic performance 80 dB SFDR at 100 MHz (±1 MHz) AOUT

4× to 20× programmable reference clock multiplier

Dual 48-bit programmable frequency registers

Dual 14-bit programmable phase offset registers

12-bit programmable amplitude modulation and on/off output shaped keying function

Single-pin FSK and BPSK data interfaces

PSK capability via input/output interface

Linear or nonlinear FM chirp functions with single-pin frequency hold function

Frequency-ramped FSK

<25 ps rms total jitter in clock generator mode

Automatic bidirectional frequency sweeping

Sin(x)/x correction

Simplified control interfaces

10 MHz serial 2- or 3-wire SPI compatible

100 MHz parallel 8-bit programming

3.3 V single supply

Multiple power-down functions

Single-ended or differential input reference clock

Small, 80-lead LQFP or TQFP with exposed pad

APPLICATIONS

Agile, quadrature LO frequency synthesis

Programmable clock generators

FM chirp source for radar and scanning systems

Test and measurement equipment

Commercial and amateur RF exciters