AD9706-EB開發(fā)板套件編程器的評估板-數(shù)模轉(zhuǎn)換器（DAC）規(guī)格書PDF中文資料

AD9706-EB屬于開發(fā)板套件編程器的評估板-數(shù)模轉(zhuǎn)換器（DAC）。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD9706-EB評估板 - 數(shù)模轉(zhuǎn)換器（DAC）該系列產(chǎn)品提供了一種方便的方法，在經(jīng)過驗證的設(shè)計環(huán)境中對用于將數(shù)字?jǐn)?shù)據(jù)轉(zhuǎn)換為模擬格式的器件進行性能或特性評估。重點器件涵蓋范圍從以適合學(xué)生或愛好者使用的方式實現(xiàn)的適度功能器件，到適合電信基礎(chǔ)設(shè)施應(yīng)用的高級器件。

GENERAL DESCRIPTION

The AD9704/AD9705/AD9706/AD9707 are the fourthgeneration family in the TxDAC series of high performance, CMOS digital-to-analog converters (DACs). This pin-compatible, 8–/10–/12–/14–bit resolution family is optimized for low power operation, while maintaining excellent dynamic performance.

FEATURES

Pin-compatible family

Low power member of pin-compatible TxDAC product family

Power dissipation @ 3.3 V 22 mW @ 10 MSPS 25 mW @ 25 MSPS 30 mW @ 50 MSPS

Sleep mode: 3.1 mW @ 3.3 V

Supply voltage: 1.7 V to 3.6 V

SFDR to Nyquist AD9707: 84 dBc @ 5 MHz output AD9707: 83 dBc @ 10 MHz output AD9707: 75 dBc @ 20 MHz output

AD9707 NSD @ 10 MHz output, 125 MSPS: ?147 dBc/Hz

Differential current outputs: 1 mA to 5 mA

Data format: twos complement or straight binary

On-chip 1.0 V reference

CMOS-compatible digital interface

Edge-triggered latches

Clock input: single-ended and differential

Output common mode: adjustable 0 V to 1.2 V

Power-down mode < 2 mW @ 3.3 V (SPI? controllable)

Serial peripheral interface (SPI)

Self-calibration

32-lead LFCSP_VQ, Pb-free package