AD9230BCPZ-250集成電路（IC）的模數(shù)轉(zhuǎn)換器（ADC）規(guī)格書PDF中文資料

AD9230BCPZ-250屬于集成電路（IC）的模數(shù)轉(zhuǎn)換器（ADC）。由亞德諾半導體技術(shù)有限公司制造生產(chǎn)的AD9230BCPZ-250模數(shù)轉(zhuǎn)換器（ADC）模數(shù)轉(zhuǎn)換器（ADC、A/D 或 A 轉(zhuǎn) D）對模擬信號進行采樣，例如由麥克風采集的聲音或傳感器的輸出，然后將其轉(zhuǎn)換為數(shù)字信號。一般來說，數(shù)字輸出是二進制補碼二進制數(shù)，與輸入成比例。輸入類型可能是差分、偽差分或單端輸入。模數(shù)轉(zhuǎn)換器可按照位數(shù)、采樣率、輸入數(shù)、接口、轉(zhuǎn)換器數(shù)和架構(gòu)（例如自適應(yīng)增量、雙斜率、折疊、流水線、SAR、三角積分、兩步式）進行選擇。

PRODUCT DESCRIPTION

The AD9230 is a 12-bit monolithic sampling analog-to-digital converter optimized for high performance, low power, and ease of use. The product operates up to a 250 MSPS conversion rate and is optimized for outstanding dynamic performance in wideband carrier and broadband systems. All necessary functions, including a track-and-hold (T/H) and voltage reference, are included on the chip to provide a complete signal conversion solution.

FEATURES

SNR = 65.5 dBFs @ fIN up to 70 MHz @ 250 MSPS

ENOB of 10.6 @ fIN up to 70 MHz @ 250 MSPS (–0.5 dBFS)

SFDR = 82 dBc@ fIN up to 70 MHz @ 250 MSPS (–0.5 dBFS)

Excellent Linearity

DNL = ±0.3 LSB (Typical)

INL = ±0.5 LSB (Typical)

LVDS at 250 MSPS (ANSI-644 levels)

900 MHz Full Power Analog Bandwidth

On-Chip Reference and Track-and-Hold

Power Dissipation = 425 mW Typical @ 250 MSPS

1.25 V Input Voltage Range

1.8 V Analog Supply Operation

Output Data Format Option

Data Clock Output Provided

Clock Duty Cycle Stabilizer

APPLICATIONS

Wireless and Wired Broadband Communications

Cable Reverse Path

Communications Test Equipment

Radar and Satellite Subsystems

Power Amplifier Linearization