AD9148-M5375-EBZ開發(fā)板套件編程器的評(píng)估板-數(shù)模轉(zhuǎn)換器（DAC）規(guī)格書PDF中文資料

AD9148-M5375-EBZ屬于開發(fā)板套件編程器的評(píng)估板-數(shù)模轉(zhuǎn)換器（DAC）。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD9148-M5375-EBZ評(píng)估板 - 數(shù)模轉(zhuǎn)換器（DAC）該系列產(chǎn)品提供了一種方便的方法，在經(jīng)過(guò)驗(yàn)證的設(shè)計(jì)環(huán)境中對(duì)用于將數(shù)字?jǐn)?shù)據(jù)轉(zhuǎn)換為模擬格式的器件進(jìn)行性能或特性評(píng)估。重點(diǎn)器件涵蓋范圍從以適合學(xué)生或愛(ài)好者使用的方式實(shí)現(xiàn)的適度功能器件，到適合電信基礎(chǔ)設(shè)施應(yīng)用的高級(jí)器件。

GENERAL DESCRIPTION

The AD9148 is a quad, 16-bit, high dynamic range, digital-toanalog converter (DAC) that provides a sample rate of 1000 MSPS. This device includes features optimized for direct conversion transmit applications, including gain, phase, and offset compensation. The DAC outputs are optimized to interface seamlessly with analog quadrature modulators such as the ADL5371/ADL5372/ADL5373/ADL5374/ADL5375.

FEATURES

Single-carrier W-CDMA ACLR = 80 dBc at 150 MHz IF

Channel-to-channel isolation > 90 dB

Analog output

Adjustable 8.7 mA to 31.7 mA

RL = 25 Ω to 50 Ω

Novel 2×, 4×, and 8× interpolator eases data interface

On-chip fine complex NCO allows carrier placement anywhere in DAC bandwidth

High performance, low noise PLL clock multiplier

Multiple chip synchronization interface

Programmable digital inverse sinc filter

Auxiliary DACs allow for offset control

Gain DACs allow for I and Q gain matching

Programmable I and Q phase compensation

Digital gain control

Flexible LVDS digital I/F supports 32- or 16-bit bus width

196-ball CSP_BGA, 12 mm × 12 mm

APPLICATIONS

Wireless infrastructure

LTE, TD-SCDMA, WiMAX, W-CDMA, CDMA2000, GSM

MIMO/transmit diversity

Digital high or low IF synthesis