AD9125BCPZRL集成電路（IC）的數(shù)模轉(zhuǎn)換器（DAC）規(guī)格書PDF中文資料

AD9125BCPZRL屬于集成電路（IC）的數(shù)模轉(zhuǎn)換器（DAC）。由亞德諾半導體技術(shù)有限公司制造生產(chǎn)的AD9125BCPZRL數(shù)模轉(zhuǎn)換器（DAC）數(shù)模轉(zhuǎn)換器（DAC、D/A、D2A 或 D 轉(zhuǎn) A）可將數(shù)字信號轉(zhuǎn)換為緩沖或無緩沖的模擬電壓或電流。DAC 架構(gòu)是否適合特定應(yīng)用，要取決于分辨率和采樣頻率。DAC 通常用于音樂播放器，將數(shù)字數(shù)據(jù)流轉(zhuǎn)換為模擬音頻流。它們還用于電視和手機，將數(shù)字視頻數(shù)據(jù)轉(zhuǎn)換為模擬視頻信號，再連接到屏幕驅(qū)動器，以顯示單色或彩色圖像。

GENERAL DESCRIPTION

The AD9125 is a dual, 16-bit, high dynamic range TxDAC+? digital-to-analog converter (DAC) that provides a sample rate of 1000 MSPS, permitting a multicarrier generation up to the Nyquist

frequency. It includes features optimized for direct conversion transmit applications, including complex digital modulation, and gain and offset compensation.

FEATURES

Flexible CMOS interface allows dual-word, word, or byte load

Single-carrier W-CDMA ACLR = 80 dBc at 122.88 MHz IF

Analog output: adjustable 8.7 mA to 31.7 mA, RL= 25 Ω to 50 Ω

Novel 2×/4×/8× interpolator/complex modulator allows carrier placement anywhere in the DAC bandwidth

Gain and phase adjustment for sideband suppression

Multichip synchronization interface

High performance, low noise PLL clock multiplier

Digital inverse sinc filter

Low power: 900 mW at 500 MSPS, full operating conditions

72-lead, exposed paddle LFCSP

APPLICATIONS

Wireless infrastructure

W-CDMA, CDMA2000, TD-SCDMA, WiMAX, GSM, LTE

Digital high or low IF synthesis

Transmit diversity

Wideband communications: LMDS/MMDS, point-to-point

Cable modem termination systems