AD835RF/IF射頻/中頻RFID的射頻放大器規(guī)格書PDF中文資料

AD835屬于RF/IF射頻/中頻RFID的射頻放大器。由亞德諾半導體技術有限公司制造生產的AD835射頻放大器在射頻應用中，射頻放大器產品可用于信號增益和緩沖。這些產品與通用運算放大器的不同之處在于，它們通常適用于更高的頻率，更傾向于提供不可調節(jié)的固定增益，并且輸入或輸出阻抗值符合常用傳輸線特性阻抗。

GENERAL DESCRIPTION

The AD835 is a complete four-quadrant, voltage output analog multiplier, fabricated on an advanced dielectrically isolated complementary bipolar process. It generates the linear product of its X and Y voltage inputs with a ?3 dB output bandwidth of 250 MHz (a small signal rise time of 1 ns). Full-scale (?1 V to +1 V) rise to fall times are 2.5 ns (with a standard RL of 150 Ω), and the settling time to 0.1 under the same conditions is typically 20 ns.

Its differential multiplication inputs (X, Y) and its summing input (Z) are at high impedance. The low impedance output voltage (W) can provide up to ±2.5 V and drive loads as low as 25 Ω. Normal operation is from ±5 V supplies.

Though providing state-of-the-art speed, the AD835 is simple to use and versatile. For example, as well as permitting the addition of a signal at the output, the Z input provides the means to operate the AD835 with voltage gains up to about ×10. In this capacity, the very low product noise of this multiplier (50 nV/√Hz) makes it much more useful than earlier products.

The AD835 is available in an 8-lead PDIP package (N) and an 8-lead SOIC package (R) and is specified to operate over the ?40°C to +85°C industrial temperature range.

FEATURES

Simple: basic function is W = XY + Z

Complete: minimal external components required

Very fast: Settles to 0.1 of full scale (FS) in 20 ns

DC-coupled voltage output simplifies use

High differential input impedance X, Y, and Z inputs

Low multiplier noise: 50 nV/√Hz

APPLICATIONS

Very fast multiplication, division, squaring

Wideband modulation and demodulation

Phase detection and measurement

Sinusoidal frequency doubling

Video gain control and keying

Voltage-controlled amplifiers and filters