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AD641S中文資料亞德諾數(shù)據(jù)手冊PDF規(guī)格書

AD641S
廠商型號

AD641S

功能描述

250 MHz Demodulating Logarithmic Amplifier

文件大小

256.67 Kbytes

頁面數(shù)量

16

生產(chǎn)廠商 Analog Devices
企業(yè)簡稱

AD亞德諾

中文名稱

亞德諾半導(dǎo)體技術(shù)有限公司官網(wǎng)

原廠標識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-1-30 11:08:00

AD641S規(guī)格書詳情

PRODUCT DESCRIPTION

The AD641 is a 250 MHz, demodulating logarithmic amplifier with an accuracy of ±2.0 dB and 44 dB dynamic range. The AD641 uses a successive detection architecture to provide an output current that is logarithmically proportional to its input voltage. The output current can be converted to a voltage using one of several on-chip resistors to select the slope. A single AD641 provides up to 44 dB of dynamic range at speeds up to 250 MHz, and two cascaded AD641s together can provide 58 dB of dynamic range at speeds up to 250 MHz. The AD641 is fully stable and well characterized over either the industrial or military temperature ranges.

FEATURES

Logarithmic Amplifier Performance

Usable to 250 MHz

44 dB Dynamic Range

±2.0 dB Log Conformance

37.5 mV/√dB Voltage Output

Stable Slope and Intercepts

2.0 nV/√Hz Input Noise Voltage

50 μV Input Offset Voltage

Low Power

±5 V Supply Operation

9 mA (+VS), 35 mA (–VS) Quiescent Current

Onboard Resistors

Onboard 10x Attenuator

Dual Polarity Current Outputs

Direct Coupled Differential Signal Path

APPLICATIONS

IF/RF Signal Processing

Received Signal Strength Indicator (RSSI)

High Speed Signal Compression

High Speed Spectrum Analyzer

ECM/Radar

產(chǎn)品屬性

  • 型號:

    AD641S

  • 功能描述:

    Log/Antilog Amplifier

供應(yīng)商 型號 品牌 批號 封裝 庫存 備注 價格
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