AD538SD集成電路（IC）的模擬乘法器、除法器規(guī)格書PDF中文資料

AD538SD屬于集成電路（IC）的模擬乘法器、除法器。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD538SD模擬乘法器、除法器模擬乘法器獲取兩個(gè)或更多模擬信號(hào)，并產(chǎn)生這些信號(hào)的乘積或乘積之和的輸出。此類電路可用于實(shí)現(xiàn)相關(guān)計(jì)算功能，例如計(jì)算平方（對(duì)兩個(gè)輸入都施加相同的信號(hào)）和平方根。應(yīng)用可能包括可變?cè)鲆娣糯笃鳌h(huán)形調(diào)制器、乘積檢測(cè)器、混頻器、增益控制、真 RMS 轉(zhuǎn)換器和脈沖幅度調(diào)制器 (PAM)。

GENERAL DESCRIPTION

The AD538 is a monolithic real-time computational circuit that provides precision analog multiplication, division, and exponentiation. The combination of low input and output offset voltages and excellent linearity results in accurate computation over an unusually wide input dynamic range. Laser wafer trimming makes multiplication and division with errors as low as 0.25 of reading possible, while typical output offsets of 100 μV or less add to the overall off-the-shelf performance level. Real-time analog signal processing is further enhanced by the 400 kHz bandwidth of the device.

FEATURES

VO = VY(VZ/VX)m transfer function

Wide dynamic range (denominator) ?1000:1

Simultaneous multiplication and division

Resistor-programmable powers and roots

No external trims required

Low input offsets <100 μV

Low error ±0.25 of reading (100:1 range)

Monolithic construction

Real-time analog multiplication, division and

exponentiation

High accuracy analog division with a wide input dynamic range

On board +2 V or +10 V scaling reference

Voltage and current (summing) input modes

Monolithic construction with lower cost and higher

reliability than hybrid and modular circuits

APPLICATIONS

One- or two-quadrant multiply/divide

Log ratio computation

Squaring/square rooting

Trigonometric function approximations

Linearization via curve fitting

Precision AGC

Power functions