831742I中文資料瑞薩數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

Description

The 831742I is a high-performance, differential HCSL clock/data

multiplexer and fanout buffer. The device is designed for the

multiplexing and fanout of high-frequency clock and data signals.

The device has four differential, selectable clock/data inputs. The

selected input signal is distributed to two low-skew differential HCSL

outputs. Each input pair accepts HCSL, LVDS and LVPECL levels.

The 831742I is characterized to operate from a 3.3V power supply.

Guaranteed input, output-to-output and part-to-part skew

characteristics make the 831742I ideal for those clock and data

distribution applications demanding well-defined performance and

repeatability. The 831742I supports the clock multiplexing and

distribution of PCI Express (2.5Gb/s), Gen2 (5Gb/s), Gen3 (8Gb/s)

and Gen4 (16Gb/s) clock signals

Features

? 4:2 differential clock/data multiplexer with fanout

? Four selectable, differential input pairs

? Each differential input pair can accept the following levels: HCSL,

LVDS and LVPECL

? Two differential HCSL output pairs

? Maximum input/output clock frequency: 700MHz

? Maximum input/output data rate: 1400Mb/s (NRZ)

? LVCMOS interface levels for all control inputs

? PCI Express (2.5Gb/s), Gen2 (5 Gb/s), Gen3 (8 Gb/s) and Gen4 (16

Gb/s) clock jitter compliant

? Input skew: 110ps max

? Part-to-part skew: 225ps max

? Full 3.3V supply voltage

? Available in lead-free (RoHS 6)

? -40°C to 85°C ambient operating temperature