82845MX中文資料英特爾數(shù)據(jù)手冊(cè)PDF規(guī)格書

Overview

The Intel 845MP/845MZ Chipset Memory Controller Hub-M (MCH-M) is designed for use with the Mobile Intel Pentium 4 Processor-M. The Intel 845MP/845MZ Chipset MCH-M manages the flow of information between its four interfaces: the System Bus, the memory interface, the AGP port, and the hub interface. The MCH-M arbitrates between the four interfaces when each initiates an operation. While doing so, the MCH-M must support data coherency via snooping and must perform address translation for access to AGP Aperture memory.

The Intel 845MP/845MZ Chipset Memory Controller Hub-M (MCH-M) may contain design defects or errors known as errata, which may cause the product to deviate from published specifications.

System Architecture

The Intel 845MP/845MZ Chipset Memory Controller Hub-M (MCH-M) component provides the processor interface, DRAM interface, AGP interface, and hub interface. The CPU interface supports the Mobile Intel Pentium 4 Processor-M subset of the Extended Mode of the Scalable Bus Protocol. The Intel 845MP/845MZ Chipset is optimized for the Mobile Intel Pentium 4 Processor-M. It supports a single channel of DDR memory. The MCH-M contains advanced power management logic. The Intel 845MP/845MZ Chipset platform supports the third generation mobile I/O Controller Hub (ICH3-M) to provide the features required by a mobile platform.

The Intel 845 Chipset-Mobile Family (MCH-M) is in a 593-pin FC-BGA package and contains the following functionality:

? Supports single Mobile Intel Pentium 4 Processor-M configurations at 400 MT/s

? AGTL+ host bus with integrated termination supporting 32-bit host addressing

? 845MP supports up to 1 GB of PC2100 Memory

? 845MZ supports up to 512 MB of PC1600 Memory

? 1.5-V AGP interface with 4x SBA/PIPE# Data Transfer and Fast Write capability

? 1.8-V, 8-bit, 66-MHz 4x hub interface to ICH3-M

? Deeper Sleep

? Intel SpeedStep? technology

? Distributed arbitration for highly concurrent operation