81C55中文資料沖電線數(shù)據(jù)手冊PDF規(guī)格書

GENERAL DESCRIPTION

The MSM81C55-5 has a 2k-bit static RAM (256 bytes) with parallel I/O ports and a timer. It uses silicon gate CMOS technology and consumes a standby current of 100 micro ampere, maximum, while the chip is not selected. Featureing a maximum access time of 400 ns, the MSM81C55-5 can be used in an MSM80C85AH system without using wait states. The parallel I/O consists of two 8-bit ports and one 6-bit port (both general purpose). The MSM81C55-5 also contains a 14-bit programmable counter/timer which may be used for sequence-wave generation or terminal count-pulsing.

FEATURES

? High speed and low power achieved with silicon gate CMOS technology

? 256 words x 8bits RAM

? Single power supply, 3 to 6 V

? Completely static operation

? On-chip address latch

? 8-bit programmable I/O ports (port A and B)

? TTL Compatible

? RAM data hold characteristic at 2 V

? 6-bit programmable I/O port (port C)

? 14-bit programmable binary counter/timer

? Multiplexed address/data bus

? Direct interface with MSM80C85AH

? 40-pin Plastic DIP (DIP40-P-600-2.54): (Product name: MSM81C55-5RS)

? 44-pin Plastic QFJ (QFJ44-P-S650-1.27): (Product name: MSM81C55-5JS)

? 44-pin Plastic QFP (QFP44-P-910-0.80-2K): (Product name: MSM81C55-5GS-2K)