DESCRIPTION

The 74VHC27 is an advanced high-speed CMOS TRIPLE 3-INPUT NOR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provides high noise immunity and stable output. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.

■ HIGH SPEED: tPD = 4.1 ns (TYP.) at VCC = 5V

■ LOW POWER DISSIPATION: ICC = 2 μA (MAX.) at TA=25°C

■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.)

■ POWER DOWN PROTECTION ON INPUTS

■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN)

■ BALANCED PROPAGATION DELAYS: tPLH ? tPHL

■ OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V

■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 27

■ IMPROVED LATCH-UP IMMUNITY

74VHC27屬于集成電路（IC） > 觸發(fā)器。意法半導(dǎo)體（ST）集團(tuán)制造生產(chǎn)的74VHC27觸發(fā)器觸發(fā)器是能夠存儲(chǔ)單個(gè)邏輯狀態(tài)或信息“位”的基本數(shù)字存儲(chǔ)器件。這些器件至少有兩個(gè)輸入；一個(gè)或多個(gè)用于傳遞要存儲(chǔ)的數(shù)據(jù)，另一個(gè)用于指示存儲(chǔ)該數(shù)據(jù)的時(shí)間點(diǎn)。不同的觸發(fā)器類型，例如 D（延遲）、SR（置位復(fù)位）和 JK，對(duì)提供給其輸入的信號(hào)有不同的響應(yīng)，可用于實(shí)現(xiàn)不同的邏輯功能。這些器件與鎖存器的不同之處在于它們是邊緣敏感器件，其保持的邏輯狀態(tài)僅在接收到有效時(shí)鐘信號(hào)時(shí)才會(huì)改變。