74S139中文資料仙童半導(dǎo)體數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

General Description

These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. When used with high-speed memories, the delay times of these decoders are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible.

Features

■ Designed specifically for high speed:

Memory decoders

Data transmission systems

■ DM74S138 3-to-8-line decoders incorporates 3 enable inputs to simplify cascading and/or data reception

■ DM74S139 contains two fully independent 2-to-4-line decoders/demultiplexers

■ Schottky clamped for high performance

■ Typical propagation delay time (3 levels of logic)

DM74S138 8 ns

DM74S139 7.5 ns

■ Typical power dissipation

DM74S138 245 mW

DM74S139 300 mW