74LS83中文資料仙童半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

General Description

These full adders perform the addition of two 4-bit binary numbers. The sum (∑) outputs are provided for each bit and the resultant carry (C4) is obtained from the fourth bit. These adders feature full internal look ahead across all four bits. This provides the system designer with partial lookahead performance at the economy and reduced package count of a ripple-carry implementation.

The adder logic, including the carry, is implemented in its true form meaning that the end-around carry can be accomplished without the need for logic or level inversion.

Features

■ Full-carry look-ahead across the four bits

■ Systems achieve partial look-ahead performance with the economy of ripple carry

■ Typical add times

Two 8-bit words 25 ns

Two 16-bit words 45 ns

■ Typical power dissipation per 4-bit adder 95 mW