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74LS112中文資料仙童半導(dǎo)體數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

74LS112
廠(chǎng)商型號(hào)

74LS112

功能描述

Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs

文件大小

52 Kbytes

頁(yè)面數(shù)量

5 頁(yè)

生產(chǎn)廠(chǎng)商 Fairchild Semiconductor
企業(yè)簡(jiǎn)稱(chēng)

Fairchild仙童半導(dǎo)體

中文名稱(chēng)

飛兆/仙童半導(dǎo)體公司官網(wǎng)

原廠(chǎng)標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠(chǎng)下載

更新時(shí)間

2024-12-23 22:30:00

74LS112規(guī)格書(shū)詳情

General Description

This device contains two independent negative-edge-trig gered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flop on the falling edge of the clock pulse. The clock triggering occurs at a voltage level and is not directly related to the transition time of the falling edge of the clock pulse. Data on the J and K inputs may be changed while the clock is HIGH or LOW without affecting the outputs as long as the setup and hold times are not violated. A low logic level on the preset or clear inputs will set or reset the outputs regardless of the logic levels of the other inputs.

產(chǎn)品屬性

  • 型號(hào):

    74LS112

  • 制造商:

    MOTOROLA

  • 制造商全稱(chēng):

    Motorola, Inc

  • 功能描述:

    DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫(kù)存 備注 價(jià)格
FAIRCHILDSEMICONDUCTOR
2020+
NA
80000
只做自己庫(kù)存,全新原裝進(jìn)口正品假一賠百,可開(kāi)13%增
詢(xún)價(jià)
TI
SOP
22
一級(jí)代理,專(zhuān)注軍工、汽車(chē)、醫(yī)療、工業(yè)、新能源、電力
詢(xún)價(jià)
ti
24+
N/A
6980
原裝現(xiàn)貨,可開(kāi)13%稅票
詢(xún)價(jià)
SIG
89
200
原裝正品現(xiàn)貨庫(kù)存價(jià)優(yōu)
詢(xún)價(jià)
FAIRCHILD
23+
NA
19960
只做進(jìn)口原裝,終端工廠(chǎng)免費(fèi)送樣
詢(xún)價(jià)
74LS112PC
3
3
詢(xún)價(jià)
HIT
23+
DIP
4500
全新原裝、誠(chéng)信經(jīng)營(yíng)、公司現(xiàn)貨銷(xiāo)售
詢(xún)價(jià)
TI
23+
SOP
3200
正規(guī)渠道,只有原裝!
詢(xún)價(jià)
22+
5000
詢(xún)價(jià)
TI/TEXAS
23+
3.9mm
8931
詢(xún)價(jià)