The 74HC74 is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.

This device consists of two D flip?flops with individual Set, Reset, and Clock inputs. Information at a D?input is transferred to the corresponding Q output on the next positive going edge of the clock input. Both Q and Q outputs are available from each flip?flop. The Set and Reset inputs are asynchronous.

Features

? Output Drive Capability: 10 LSTTL Loads

? Outputs Directly Interface to CMOS, NMOS, and TTL

? Operating Voltage Range: 2.0 to 6.0 V

? Low Input Current: 1.0 μA

? High Noise Immunity Characteristic of CMOS Devices

? In Compliance with the JEDEC Standard No. 7A Requirements

? ESD Performance: HBM  > 2000 V; Machine Model  > 200 V

? Chip Complexity: 128 FETs or 32 Equivalent Gates

? Pb?Free Packages are Available

74HC74屬于集成電路（IC） > 觸發(fā)器。安森美半導(dǎo)體公司制造生產(chǎn)的74HC74觸發(fā)器觸發(fā)器是能夠存儲單個邏輯狀態(tài)或信息“位”的基本數(shù)字存儲器件。這些器件至少有兩個輸入；一個或多個用于傳遞要存儲的數(shù)據(jù)，另一個用于指示存儲該數(shù)據(jù)的時間點。不同的觸發(fā)器類型，例如 D（延遲）、SR（置位復(fù)位）和 JK，對提供給其輸入的信號有不同的響應(yīng)，可用于實現(xiàn)不同的邏輯功能。這些器件與鎖存器的不同之處在于它們是邊緣敏感器件，其保持的邏輯狀態(tài)僅在接收到有效時鐘信號時才會改變。