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74HC4067-Q100中文資料安世數(shù)據(jù)手冊PDF規(guī)格書

74HC4067-Q100
廠商型號

74HC4067-Q100

功能描述

16-channel analog multiplexer/demultiplexer

文件大小

351.23 Kbytes

頁面數(shù)量

25

生產(chǎn)廠商 Nexperia B.V. All rights reserved
企業(yè)簡稱

NEXPERIA安世

中文名稱

安世半導體(中國)有限公司官網(wǎng)

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數(shù)據(jù)手冊

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更新時間

2025-1-5 11:12:00

74HC4067-Q100規(guī)格書詳情

1. General description

The 74HC4067-Q100; 74HCT4067-Q100 is a single-pole 16-throw analog switch (SP16T) suitable

for use in analog or digital 16:1 multiplexer/demultiplexer applications. The switch features four

digital select inputs (S0, S1, S2 and S3), sixteen independent inputs/outputs (Yn), a common

input/output (Z) and a digital enable input (E). When E is HIGH, the switches are turned off. Inputs

include clamp diodes. This enables the use of current limiting resistors to interface inputs to

voltages in excess of VCC.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

(Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

? Automotive product qualification in accordance with AEC-Q100 (Grade 1)

? Specified from -40 °C to +85 °C and from -40 °C to +125 °C

? Wide supply voltage range from 2.0 V to 10.0 V

? Input levels S0, S1, S2, S3 and E inputs:

? For 74HC4067-Q100: CMOS level

? For 74HCT4067-Q100: TTL level

? CMOS low power dissipation

? High noise immunity

? Typical ‘break before make’ built-in

? Low ON resistance:

? 80 Ω (typical) at VCC = 4.5 V

? 70 Ω (typical) at VCC = 6.0 V

? 60 Ω (typical) at VCC = 9.0 V

? Complies with JEDEC standards:

? JESD8C (2.7 V to 3.6 V)

? JESD7A (2.0 V to 6.0 V)

? Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

? ESD protection:

? MIL-STD-883, method 3015 exceeds 2000 V

? HBM JESD22-A114F exceeds 2000 V

? MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

? CDM JESD22-C101E exceeds 1000 V

? Multiple package options

? DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of

solder joints

3. Applications

? Analog multiplexing and demultiplexing

? Digital multiplexing and demultiplexing

? Signal gating

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