74F845中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

74F841/74F842 10-bit bus interface latches, non-inverting/inverting (3-State)

74F843 9-bit bus interface latch, non-inverting (3-State)

74F845/74F846 8-bit bus interface latches, non-inverting/inverting (3-State)

DESCRIPTION

The 74F841–74F846 bus interface latch series are designed to provide extra data width for wider address/data paths of buses carrying parity.

The 74F841–74F846 series are funcitonally an pin compatible to the AMD AM29841–AM29846 series.

FEATURES

? High speed parallel latches

? Extra data width for wide address/data paths or buses carrying parity

? High impedance NPN base input structure minimizes bus loading

? IIL is 20μA vs 1000A for AM29841 series

? Buffered control inputs to reduce AC effects

? Ideal where high speed, light loading, or increased fan-in are

required as with MOS microprocessors

? Positive and negative over-shoots are clamped to ground

? 3-State outputs glitch free during power-up and power-down

? 48mA sink current

? Slim dual in-line 300 mil package

? Broadside pinout

? Pin-for-pin and function compatible with AMD AM29841-846 series