74F132集成電路（IC）的門反相器規(guī)格書PDF中文資料

DESCRIPTION

The 74F132 contains four 2-input NAND gates which accept

standard TTL input signals and provide standard TTL output levels.

They are capable of transforming slowly changing input signals into

sharply defined, jitter-free output signals. In addition, they have

greater noise margin than conventional NAND gates. Each circuit

contains a 2-input Schmitt trigger followed by a Darlington level

shifter and a phase splitter driving a TTL totem-pole output. The

Scmitt trigger uses positive feedback to effectively speed-up slow

input transitions and provide different input threshold voltages for

positive and negative-going transitions. This hysteresis between the

positive-going and negative-going input threshold (typically 800mV)

is determined by resistor ratios and is essentially insensitive to

temperature and supply voltage variations. As long as three inputs

remain at a more positive voltage than VT+MAX, the gate will

respond in the transition of the other input as shown in Waveform 1.