首頁 >74F112N>規(guī)格書列表
| 零件編號 | 下載 訂購 | 功能描述/絲印 | 制造商 上傳企業(yè) | LOGO |
|---|---|---|---|---|
DualJKNegativeEdge-TriggeredFlip-Flop | FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司 | Fairchild | ||
DualJKNegativeEdge-TriggeredFlip-Flop GeneralDescription The74F112containstwoindependent,high-speedJKflipflopswithDirectSetandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJ | FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司 | Fairchild | ||
DualJKNegativeEdge-TriggeredFlip-Flop GeneralDescription The74F112containstwoindependent,high-speedJKflipflopswithDirectSetandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJ | FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司 | Fairchild | ||
DualJKNegativeEdge-TriggeredFlip-Flop | FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司 | Fairchild | ||
DualJKNegativeEdge-TriggeredFlip-Flop | FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司 | Fairchild | ||
DualJKNegativeEdge-TriggeredFlip-Flop GeneralDescription The74F112containstwoindependent,high-speedJKflipflopswithDirectSetandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJ | FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司 | Fairchild | ||
DualJ-Knegativeedge-triggeredflip-flop DESCRIPTION The74F112,DualNegativeEdge-TriggeredJK-TypeFlip-Flop,featureindividualJ,K,Clock(CPn),Set(SD)andReset(RD)inputs,true(Qn)andcomplementary(Qn)outputs. TheSDandRDinputs,whenLow,setorresettheoutputsasshownintheFunctionTable,regardlessofthelevel | PhilipsPhilips Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
DualJ-Knegativeedge-triggeredflip-flop DESCRIPTION The74F112,DualNegativeEdge-TriggeredJK-TypeFlip-Flop,featureindividualJ,K,Clock(CPn),Set(SD)andReset(RD)inputs,true(Qn)andcomplementary(Qn)outputs. TheSDandRDinputs,whenLow,setorresettheoutputsasshownintheFunctionTable,regardlessofthelevel | PhilipsPhilips Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | ||
DUALJKNEGATIVEEDGE-TRIGGEREDFLIP-FLOP TheMC74F112containstwoindependent,high-speedJKflip-flopswithDirectSetandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJandKinputscanc | MotorolaMotorola, Inc 摩托羅拉加爾文制造公司 | Motorola | ||
DUALJKNEGATIVEEDGE-TRIGGEREDFLIP-FLOP TheMC74F112containstwoindependent,high-speedJKflip-flopswithDirectSetandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJandKinputscanc | MotorolaMotorola, Inc 摩托羅拉加爾文制造公司 | Motorola |
| 供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價(jià)格 |
|---|
